Patents by Inventor Sin-An LIN

Sin-An LIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240367202
    Abstract: A process tool including a polishing pad on a top surface of a wafer platen. A wafer carrier is configured to hold a wafer over the polishing pad. A slurry dispenser is configured to dispense an abrasive slurry including a plurality of charged abrasive particles having a first polarity onto the polishing pad. A first conductive rod is within the wafer platen and coupled to a first voltage supply. A wafer roller is configured to support the wafer. A first wafer brush is arranged beside the wafer roller. A second conductive rod is within the first wafer brush and coupled to a second voltage supply. The first voltage supply is configured to apply a first charge having a second polarity, opposite the first polarity, to the first conductive rod. The second voltage supply is configured to apply a second charge having the second polarity to the second conductive rod.
    Type: Application
    Filed: July 19, 2024
    Publication date: November 7, 2024
    Inventors: Chih-Wen Liu, Yeo-Sin Lin, Shu-Wei Hsu, Che-Hao Tu, Hui-Chi Huang, Kei-Wei Chen
  • Patent number: 12128455
    Abstract: A method comprising: providing a slurry to a polishing pad that is disposed on a wafer platen, the slurry comprising a plurality of electrically charged abrasive particles having a first electrical polarity; moving a first side of a wafer into contact with the slurry and the polishing pad; applying a first electrical charge having a second electrical polarity, opposite the first electrical polarity, to a first conductive rod; moving the first side of the wafer away from the polishing pad while the first electrical charge is applied to the first conductive rod; moving a first wafer brush into contact with the first side of the wafer; applying a second electrical charge having the second electrical polarity, opposite the first electrical polarity, to a second conductive rod arranged within the first wafer brush; and moving the first wafer brush away from the first side of the wafer.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: October 29, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Wen Liu, Yeo-Sin Lin, Shu-Wei Hsu, Che-Hao Tu, Hui-Chi Huang, Kei-Wei Chen
  • Patent number: 12118925
    Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current flowing through one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.
    Type: Grant
    Filed: September 7, 2023
    Date of Patent: October 15, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Che-Chia Chang, Shang-Jie Wu, Yu-Chieh Kuo, Hsien-Chun Wang, Sin-An Lin, Mei-Yi Li, Yu-Hsun Chiu, Ming-Hung Chuang, Yi-Jung Chen
  • Publication number: 20240050995
    Abstract: A process tool including a polishing pad on a top surface of a wafer platen. A wafer carrier is configured to hold a wafer over the polishing pad. A slurry dispenser is configured to dispense an abrasive slurry including a plurality of charged abrasive particles having a first polarity onto the polishing pad. A first conductive rod is within the wafer platen and coupled to a first voltage supply. A wafer roller is configured to support the wafer. A first wafer brush is arranged beside the wafer roller. A second conductive rod is within the first wafer brush and coupled to a second voltage supply. The first voltage supply is configured to apply a first charge having a second polarity, opposite the first polarity, to the first conductive rod. The second voltage supply is configured to apply a second charge having the second polarity to the second conductive rod.
    Type: Application
    Filed: August 15, 2022
    Publication date: February 15, 2024
    Inventors: Chih-Wen Liu, Yeo-Sin Lin, Shu-Wei Hsu, Che-Hao Tu, Hui-Chi Huang, Kei-Wei Chen
  • Publication number: 20230419883
    Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current flowing through one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.
    Type: Application
    Filed: September 7, 2023
    Publication date: December 28, 2023
    Inventors: Che-Chia CHANG, Shang-Jie WU, Yu-Chieh KUO, Hsien-Chun WANG, Sin-An LIN, Mei-Yi LI, Yu-Hsun CHIU, Ming-Hung CHUANG, Yi-Jung CHEN
  • Publication number: 20230335508
    Abstract: An electronic device and a repair method thereof are provided. The repair method of the electronic device includes: providing a panel, wherein the panel includes a substrate, a first conductive layer disposed on the substrate, a transistor disposed on the substrate, and a dielectric layer disposed between the first conductive layer and the transistor, wherein the transistor comprises a first electrode and a second electrode; and cutting at least one of the first electrode and the second electrode with a laser beam, wherein a cutting point formed by the laser beam does not overlap with the first conductive layer.
    Type: Application
    Filed: March 21, 2023
    Publication date: October 19, 2023
    Applicant: Innolux Corporation
    Inventors: Jia-Sin Lin, Yi-Hung Lin, Yan-Zheng Wu, Chen-Lin Yeh
  • Patent number: 11790832
    Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current to illuminate one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: October 17, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Che-Chia Chang, Shang-Jie Wu, Yu-Chieh Kuo, Hsien-Chun Wang, Sin-An Lin, Mei-Yi Li, Yu-Hsun Chiu, Ming-Hung Chuang, Yi-Jung Chen
  • Publication number: 20230178534
    Abstract: This disclosure provides a communication device and a manufacturing method thereof. The manufacturing method of the communication device includes the following steps: providing a first dielectric layer, wherein the first dielectric layer includes a first region and a second region, and the first dielectric layer has a first surface and a second surface opposite to the first surface; providing a second dielectric layer; combining the first dielectric layer and the second dielectric layer with a sealing element, so that the sealing element is disposed between the first surface of the first dielectric layer and a third surface of the second dielectric layer; after combining the first dielectric layer and the second dielectric layer, thinning the second surface of the first dielectric layer; and disposing a first communication element on the first surface of the first dielectric layer in the first region.
    Type: Application
    Filed: November 18, 2022
    Publication date: June 8, 2023
    Applicant: Innolux Corporation
    Inventors: Jia-Sin Lin, Wen-Chi Fang, Jen-Hai Chi, Zhi-Fu Huang, Pei-Chi Chen, Wan-Chun Tsai
  • Publication number: 20230171896
    Abstract: A manufacturing method of an electronic device including following steps is provided. A first substrate is provided. A thermal release adhesive layer is provided on the first substrate. A thinning process is performed on the first substrate to form a first thinned substrate. A cutting process is performed on the first thinned substrate to form a first sub-substrate. The thermal release adhesive layer is separated from the first thinned substrate or the first sub-substrate. In the manufacturing method of the electronic device provided in one or more embodiments of the disclosure, the manufacturing process of the electronic device may be simplified, and/or defects of the resultant electronic device may be reduced.
    Type: Application
    Filed: October 30, 2022
    Publication date: June 1, 2023
    Applicant: Innolux Corporation
    Inventors: Pei-Chi Chen, Wen-Chi Fang, Jen-Hai Chi, Zhi-Fu Huang, Jia-Sin Lin, Wan-Chun Tsai
  • Patent number: 11636794
    Abstract: A pixel driving device includes at least one data line and at least one driver integrated circuit. The at least one data line includes a first area and a second area on both sides. The first area and the second area are separated by the at least one data line. The at least one driver integrated circuit includes a first circuit and a second circuit. The first circuit is disposed in the first area, is configured to receive at least one first high-frequency signal so as to at least one first driving signal. The second circuit is disposed in the second area, is coupled to the first circuit and is configured to receive at least one low-frequency signal.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: April 25, 2023
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Che-Chia Chang, Yi-Jung Chen, Shang-Jie Wu, Yu-Chieh Kuo, Hsien-Chun Wang, Ming-Hung Chuang, Mei-Yi Li, Chen-Ying Chou, Sin-An Lin
  • Patent number: 11443675
    Abstract: A shift register circuit includes a driving signal generating circuit, a coupling circuit, and a sweep signal generating circuit. The driving signal generating circuit is configured to receive a plurality of first clock signals, a low voltage source, an initial signal, and a first high voltage source so as to output a driving signal. The coupling circuit is coupled to the driving signal generating circuit. The coupling circuit is configured to transmit the low voltage source. The sweep signal generating circuit is coupled to the coupling circuit. The sweep signal generating circuit is configured to receive a second clock signal, the low voltage source, and a second high voltage source so as to output a sweep signal. A waveform of the sweep signal includes an oblique waveform. The first high voltage source and the second high voltage source are electrically independent of each other.
    Type: Grant
    Filed: September 8, 2021
    Date of Patent: September 13, 2022
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Che-Chia Chang, Yi-Jung Chen, Shang-Jie Wu, Yu-Chieh Kuo, Hsien-Chun Wang, Ming-Hung Chuang, Mei-Yi Li, Sin-An Lin, Chen-Ying Chou
  • Publication number: 20220223085
    Abstract: A shift register circuit includes a driving signal generating circuit, a coupling circuit, and a sweep signal generating circuit. The driving signal generating circuit is configured to receive a plurality of first clock signals, a low voltage source, an initial signal, and a first high voltage source so as to output a driving signal. The coupling circuit is coupled to the driving signal generating circuit. The coupling circuit is configured to transmit the low voltage source. The sweep signal generating circuit is coupled to the coupling circuit. The sweep signal generating circuit is configured to receive a second clock signal, the low voltage source, and a second high voltage source so as to output a sweep signal. A waveform of the sweep signal includes an oblique waveform. The first high voltage source and the second high voltage source are electrically independent of each other.
    Type: Application
    Filed: September 8, 2021
    Publication date: July 14, 2022
    Inventors: Che-Chia CHANG, Yi-Jung CHEN, Shang-Jie WU, Yu-Chieh KUO, Hsien-Chun WANG, Ming-Hung CHUANG, Mei-Yi LI, Sin-An LIN, Chen-Ying CHOU
  • Publication number: 20220223086
    Abstract: A pixel driving device includes at least one data line and at least one driver integrated circuit. The at least one data line includes a first area and a second area on both sides. The first area and the second area are separated by the at least one data line. The at least one driver integrated circuit includes a first circuit and a second circuit. The first circuit is disposed in the first area, is configured to receive at least one first high-frequency signal so as to at least one first driving signal. The second circuit is disposed in the second area, is coupled to the first circuit and is configured to receive at least one low-frequency signal.
    Type: Application
    Filed: September 8, 2021
    Publication date: July 14, 2022
    Inventors: Che-Chia CHANG, Yi-Jung CHEN, Shang-Jie WU, Yu-Chieh KUO, Hsien-Chun WANG, Ming-Hung CHUANG, Mei-Yi LI, Chen-Ying CHOU, Sin-An LIN
  • Publication number: 20220114951
    Abstract: A display device includes a multiple of light-emitting elements and a multiple of driving circuits. Each of the multiple of driving circuits is configured to generate a driving current to illuminate one of the multiple of light-emitting elements. Each of the multiple of driving circuits includes a first transistor, a second transistor, a reset circuit, a first control circuit and a second control circuit. The driving current flows from a first system high voltage terminal through the first transistor, the second transistor and one of the multiple of light-emitting elements to a system low voltage terminal. The first control circuit is configured to control the first transistor to modulate pulse amplitude of the driving current. The second control circuit is configured to control the second transistor to modulate pulse width of the driving current.
    Type: Application
    Filed: September 8, 2021
    Publication date: April 14, 2022
    Inventors: Che-Chia CHANG, Shang-Jie WU, Yu-Chieh KUO, Hsien-Chun WANG, Sin-An LIN, Mei-Yi LI, Yu-Hsun CHIU, Ming-Hung CHUANG, Yi-Jung CHEN
  • Patent number: 11107689
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a pad oxide layer on the substrate, wherein the pad oxide layer comprises a first thickness; performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region; performing a first cleaning process to reduce the first thickness of the pad oxide layer on the PMOS region to a second thickness; performing an anneal process; and performing a second cleaning process to remove the pad oxide layer.
    Type: Grant
    Filed: December 3, 2018
    Date of Patent: August 31, 2021
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shi-You Liu, Tsai-Yu Wen, Ming-Shiou Hsieh, Rong-Sin Lin, Ching-I Li, Neng-Hui Yang
  • Publication number: 20200144064
    Abstract: A method for fabricating semiconductor device includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a pad oxide layer on the substrate, wherein the pad oxide layer comprises a first thickness; performing an implantation process to inject germanium (Ge) into the substrate on the PMOS region; performing a first cleaning process to reduce the first thickness of the pad oxide layer on the PMOS region to a second thickness; performing an anneal process; and performing a second cleaning process to remove the pad oxide layer.
    Type: Application
    Filed: December 3, 2018
    Publication date: May 7, 2020
    Inventors: Shi-You Liu, Tsai-Yu Wen, Ming-Shiou Hsieh, Rong-Sin Lin, Ching-I Li, Neng-Hui Yang
  • Publication number: 20190067477
    Abstract: A semiconductor structure includes a substrate, fin-shaped structures disposed on the substrate, an isolation layer disposed between the fin-shaped structures, and a doped region disposed in an upper portion of the isolation layer, where the doped region is doped with helium or neon.
    Type: Application
    Filed: August 28, 2017
    Publication date: February 28, 2019
    Inventors: Shi-You Liu, Ming-Shiou Hsieh, Rong-Sin Lin, Han-Ting Yen, Tsai-Yu Wen, Ching-I Li
  • Patent number: 10146098
    Abstract: A transparent display device is provided with a first liquid crystal layer having a first electrode, a second electrode, a plurality of first liquid crystal molecules, and a plurality of first chiral molecules disposed between the first electrode and the second electrode; and a second liquid crystal layer having a third electrode, a fourth electrode, a plurality of second liquid crystal molecules, a plurality of second chiral molecules, and a dichroic dye disposed between the third electrode and the fourth electrode. The first liquid crystal molecules and the second liquid crystal molecules both have positive anisotropies, and the dichroic dye has a visible absorption wavelength ranged from 400 to 780 nm.
    Type: Grant
    Filed: January 10, 2017
    Date of Patent: December 4, 2018
    Assignee: NATIONAL SUN YAT-SEN UNIVERSITY
    Inventors: Tsung-Hsien Lin, Cheng-Chang Li, Hung-Chang Jau, Sin-An Lin
  • Publication number: 20180143467
    Abstract: A transparent display device is provided with a first liquid crystal layer having a first electrode, a second electrode, a plurality of first liquid crystal molecules, and a plurality of first chiral molecules disposed between the first electrode and the second electrode; and a second liquid crystal layer having a third electrode, a fourth electrode, a plurality of second liquid crystal molecules, a plurality of second chiral molecules, and a dichroic dye disposed between the third electrode and the fourth electrode. The first liquid crystal molecules and the second liquid crystal molecules both have positive anisotropies, and the dichroic dye has a visible absorption wavelength ranged from 400 to 780 nm.
    Type: Application
    Filed: January 10, 2017
    Publication date: May 24, 2018
    Inventors: Tsung-Hsien LIN, Cheng-Chang LI, Hung-Chang JAU, Sin-An LIN
  • Patent number: 9966434
    Abstract: A semiconductor device includes a substrate including a plurality of transistor devices formed thereon, at least an epitaxial structure formed in between the transistor devices, and a tri-layered structure formed on the epitaxial structure. The epitaxial structure includes a first semiconductor material and a second semiconductor material, and a lattice constant of the second semiconductor material is larger than a lattice constant of the first semiconductor material. The tri-layered structure includes an undoped epitaxial layer, a metal-semiconductor compound layer, and a doped epitaxial layer sandwiched in between the undoped epitaxial layer and the metal-semiconductor compound layer. The undoped epitaxial layer and the doped epitaxial layer include at least the second semiconductor material.
    Type: Grant
    Filed: June 26, 2017
    Date of Patent: May 8, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Ming-Shiou Hsieh, Chun-Yao Yang, Shi-You Liu, Rong-Sin Lin, Han-Ting Yen, Yi-Wei Chen, I-Cheng Hu, Yu-Shu Lin, Neng-Hui Yang