Abstract: The present invention simulates the behavior of a storage component by first determining whether a timing violation has occurred for the storage component. If one or more timing violations is detected, then an x (indicating uncertainty) is reflected at the output of the storage component. This x is maintained at the output of the storage component for a predetermined number of timing units. After the predetermined number of timing units has expired, the output of the storage component is changed from x to a certain value, such as a logical 1 or a logical 0. By changing the output to a certain value, the present invention prevents the x at the output of the storage component from indefinitely propagating to other components in the circuit. This in turn prevents large numbers of x's from appearing in the simulation results provided to the designer. Instead, values that are certain will appear in the results.