Patents by Inventor Sining PAN

Sining PAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20260172035
    Abstract: A delay buffer unit and an operating method thereof, a computing device and an operating method thereof. The delay buffer unit includes a first-stage inverter, a second-stage inverter and a delay adjustment sub-unit, an input terminal of the first-stage inverter serves as an input terminal of the delay buffer unit; an input terminal of the second-stage inverter is connected with an output terminal of the first-stage inverter, and an output terminal of the second-stage inverter serves as an output terminal of the delay buffer unit; the delay adjustment sub-unit is connected between a first terminal of the first-stage inverter and a first operating voltage terminal, and the delay adjustment sub-unit includes a memristor and is configured to adjust a transmission delay of the first-stage inverter by controlling and using the memristor according to a first control signal.
    Type: Application
    Filed: November 16, 2023
    Publication date: June 18, 2026
    Applicant: TSINGHUA UNIVERSITY
    Inventors: Huaqiang WU, Songtao WEI, Sining PAN, Dong WU, Peng YAO, Lu JIE, Bin GAO, He QIAN