Abstract: An example method performed by a wireless-power-transmitting device including an antenna array is provided. The method includes, based on a location of the wireless-power-receiving device, selecting a first value for a first transmission characteristic that is used for transmission of electromagnetic waves by a first antenna group, and a second value, distinct from the first value, for the first transmission characteristic that is used for transmission of electromagnetic waves by a second antenna group. The method also includes transmitting to the location of the wireless-power-receiving device, by the first antenna group, first electromagnetic waves with the first value for the first transmission characteristic, and transmitting to a focal point that is further from the wireless-power-transmitting device than the location of the wireless-power-receiving device, by the second antenna group, second electromagnetic waves with the second value for the first transmission characteristic.

Abstract: An example method performed by a wireless-power-transmitting device including an antenna array is provided. The method includes, based on a location of the wireless-power-receiving device, selecting a first value for a first transmission characteristic that is used for transmission of electromagnetic waves by a first antenna group, and a second value, distinct from the first value, for the first transmission characteristic that is used for transmission of electromagnetic waves by a second antenna group. The method also includes transmitting to the location of the wireless-power-receiving device, by the first antenna group, first electromagnetic waves with the first value for the first transmission characteristic, and transmitting to a focal point that is further from the wireless-power-transmitting device than the location of the wireless-power-receiving device, by the second antenna group, second electromagnetic waves with the second value for the first transmission characteristic.

Abstract: An example method performed by a wireless-power-transmitting device that includes an antenna array is provided. The method includes radiating electromagnetic waves that form a maximum power level at a first distance away from the antenna array. Moreover, a power level of the radiated electromagnetic waves decreases, relative to the maximum power level, by at least a predefined amount at a predefined radial distance away from the maximum power level. In some embodiments, the method also includes detecting a location of a wireless-power-receiving device, whereby the location of the wireless-power-receiving device is further from the antenna array than a location of the maximum power level.

Abstract: An example method performed by a wireless-power-transmitting device that includes an antenna array is provided. The method includes radiating electromagnetic waves that form a maximum power level at a first distance away from the antenna array. Moreover, a power level of the radiated electromagnetic waves decreases, relative to the maximum power level, by at least a predefined amount at a predefined radial distance away from the maximum power level. In some embodiments, the method also includes detecting a location of a wireless-power-receiving device, whereby the location of the wireless-power-receiving device is further from the antenna array than a location of the maximum power level.

Abstract: An example method performed by a wireless-power-transmitting device that includes an antenna array is provided. The method includes radiating electromagnetic waves that form a maximum power level at a first distance away from the antenna array. Moreover, a power level of the radiated electromagnetic waves decreases, relative to the maximum power level, by at least a predefined amount at a predefined radial distance away from the maximum power level. In some embodiments, the method also includes detecting a location of a wireless-power-receiving device, whereby the location of the wireless-power-receiving device is further from the antenna array than a location of the maximum power level.

Abstract: An example method performed by a wireless-power-transmitting device that includes an antenna array is provided. The method includes radiating electromagnetic waves that form a maximum power level at a first distance away from the antenna array. Moreover, a power level of the radiated electromagnetic waves decreases, relative to the maximum power level, by at least a predefined amount at a predefined radial distance away from the maximum power level. In some embodiments, the method also includes detecting a location of a wireless-power-receiving device, whereby the location of the wireless-power-receiving device is further from the antenna array than a location of the maximum power level.

Abstract: A high-Q on-chip inductor includes a primary winding and an auxiliary winding. The primary winding includes a first node and a second node. The auxiliary winding is operably coupled to increase a quality factor of the primary winding.

Abstract: A high Q on-chip inductor includes a primary winding and an auxiliary winding that is coupled to receive a proportionally opposite representation of an input of the primary winding. Further, the auxiliary winding has an admittance that is greater than the admittance of the primary winding thereby yielding an asymmetry in the admittances. As such, a push/pull mechanism is obtained in a 2-port system (e.g., 1st and 2nd nodes of the primary winding) that produces a large Q factor for an on-chip inductor.

Abstract: An on-chip inductor may be fabricated by creating at least one dielectric layer, creating at least one conductive winding on the at least one dielectric layer and creating: (1) a P-well layer having a major surface parallel to a major surface of the dielectric layer, (2) field oxide layer having a major surface parallel to a major surface of the dielectric layer, (3) P-well and field oxide layer, or (4) a poly-silicon layer having a major surface parallel to a major surface of the dielectric layer.

Abstract: An on-chip inductor and/or on-chip transformer includes at least one dielectric layer and at least one conductive winding on the at least one dielectric layer. The conductive winding has a substantially square geometry and has at least its exterior corners geometrically shaped to reduce impedance of the conductive winding at a particular operating frequency. Since the quality factor of an on-chip inductor is inversely proportional to the effective series impedance of an inductor at an operating frequency, by reducing the effective series impedance, the quality factor is increased.

Abstract: A high-Q on-chip inductor includes a primary winding and an auxiliary winding. The primary winding includes a first node and a second node. The auxiliary winding is operably coupled to increase a quality factor of the primary winding.

Abstract: A high Q on-chip inductor includes a primary winding and an auxiliary winding that is coupled to receive a proportionally opposite representation of an input of the primary winding. Further, the auxiliary winding has an admittance that is greater than the admittance of the primary winding thereby yielding an asymmetry in the admittances. As such, a push/pull mechanism is obtained in a 2-port system (e.g., 1st and 2nd nodes of the primary winding) that produces a large Q factor for an on-chip inductor.

Abstract: An on-chip inductor and/or on-chip transformer includes at least one dielectric layer and at least one conductive winding on the at least one dielectric layer. The conductive winding has a substantially square geometry and has at least its exterior corners geometrically shaped to reduce impedance of the conductive winding at a particular operating frequency. Since the quality factor of an on-chip inductor is inversely proportional to the effective series impedance of an inductor at an operating frequency, by reducing the effective series impedance, the quality factor is increased.

Abstract: An on-chip inductor may be fabricated by creating at least one dielectric layer, creating at least one conductive winding on the at least one dielectric layer and creating: (1) a P-well layer having a major surface parallel to a major surface of the dielectric layer, (2) field oxide layer having a major surface parallel to a major surface of the dielectric layer, (3) P-well and field oxide layer, or (4) a poly-silicon layer having a major surface parallel to a major surface of the dielectric layer.

Abstract: A high Q on-chip inductor includes a primary winding and an auxiliary winding that is coupled to receive a proportionally opposite representation of an input of the primary winding. Further, the auxiliary winding has an admittance that is greater than the admittance of the primary winding thereby yielding an asymmetry in the admittances. As such, a push/pull mechanism is obtained in a 2-port system (e.g., 1st and 2nd nodes of the primary winding) that produces a large Q factor for an on-chip inductor.

Abstract: A high Q on-chip inductor includes a primary winding and an auxiliary winding that is coupled to receive a proportionally opposite representation of an input of the primary winding. Further, the auxiliary winding has an admittance that is greater than the admittance of the primary winding thereby yielding an asymmetry in the admittances. As such, a push/pull mechanism is obtained in a 2-port system (e.g., 1st and 2nd nodes of the primary winding) that produces a large Q factor for an on-chip inductor.

Abstract: An on-chip inductor may be fabricated by creating at least one dielectric layer, creating at least one conductive winding on the at least one dielectric layer and creating: (1) a P-well layer having a major surface parallel to a major surface of the dielectric layer, (2) field oxide layer having a major surface parallel to a major surface of the dielectric layer, (3) P-well and field oxide layer, or (4) a poly-silicon layer having a major surface parallel to a major surface of the dielectric layer.

Abstract: An on-chip inductor and/or on-chip transformer includes at least one dielectric layer and at least one conductive winding on the at least one dielectric layer. The conductive winding has a substantially square geometry and has at least its exterior corners geometrically shaped to reduce impedance of the conductive winding at a particular operating frequency. Since the quality factor of an on-chip inductor is inversely proportional to the effective series impedance of an inductor at an operating frequency, by reducing the effective series impedance, the quality factor is increased.