Patents by Inventor Sitanshu Seth

Sitanshu Seth has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Formal method for clock tree analysis and optimization
    Patent number: 10325046
    Abstract: Configuring a hardware verification system includes receiving first data representing a first integrated circuit design configured to operate via a first clock signal derived from a second clock signal and a third signal generated by the second clock signal. The computer transforms the first data into second data representing a second design that includes functionality of the first design. The transformation replaces the first clock signal with the second clock signal. A first Boolean function is defined by first and second values of the third signal corresponding to a first transition of the second clock signal being in a same direction as a transition of the first clock signal. A second Boolean function is defined by the first and second values of the third signal corresponding to a second transition of the second clock signal being in a direction opposite to the associated transition of the first clock signal.
    Type: Grant
    Filed: September 15, 2017
    Date of Patent: June 18, 2019
    Assignee: SYNOPSYS, INC.
    Inventors: Lingyi Liu, Ngai Ngai William Hung, Sitanshu Seth, Leonid Alexander Broukhis, Dhiraj Goswami
  • FORMAL METHOD FOR CLOCK TREE ANALYSIS AND OPTIMIZATION
    Publication number: 20180082004
    Abstract: Configuring a hardware verification system includes receiving first data representing a first integrated circuit design configured to operate via a first clock signal derived from a second clock signal and a third signal generated by the second clock signal. The computer transforms the first data into second data representing a second design that includes functionality of the first design. The transformation replaces the first clock signal with the second clock signal. A first Boolean function is defined by first and second values of the third signal corresponding to a first transition of the second clock signal being in a same direction as a transition of the first clock signal. A second Boolean function is defined by the first and second values of the third signal corresponding to a second transition of the second clock signal being in a direction opposite to the associated transition of the first clock signal.
    Type: Application
    Filed: September 15, 2017
    Publication date: March 22, 2018
    Inventors: Lingyi Liu, Ngai Ngai William Hung, Sitanshu Seth, Leonid Alexander Broukhis, Dhiraj Goswami