Abstract: A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.

Abstract: A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.

Abstract: A radio frequency integrated circuit (RFIC) and method of communication are provided. The RFIC includes phased-locked loop (PLL) and data stream circuitry and a plurality of tiles in communication with the PLL and data stream circuitry. The plurality of tiles includes comprising at least one tile for each frequency band of the RFIC. The plurality of tiles are configured to communicate a data stream signal between tiles in a cascading sequence. Each tile of the plurality of tiles includes a plurality of up/down conversion mixers for converting the data stream signal between an intermediate frequency (IF) and a radio frequency (RF). Each tile also includes a plurality of front end (FE) elements, each in communication with a corresponding antenna and an up/down conversion mixer of the plurality of up/down conversion mixers.

Abstract: A variable gain amplifier includes a first transconductor circuit coupled to a first input terminal, a first output terminal, and a second output terminal of the variable gain amplifier, the first transconductor circuit including: a plurality of positive coefficient transistors coupled to the first output terminal and configured to selectively conduct current in response to a first binary code, a plurality of negative coefficient transistors coupled to the second output terminal and configured to selectively conduct current in response to a second binary code, and a plurality of amplifying transistors, each having a gate electrode coupled to the first input terminal, a first electrode coupled to a ground reference, and a second electrode coupled to a pair of coefficient transistors including one of the plurality of positive coefficient transistors and one of the plurality of negative coefficient transistors.

Abstract: A shunt switch. In some embodiments, the shunt switch includes a transistor stack including a first transistor and a capacitor. The transistor stack may have a first end terminal and a second end terminal, the first transistor being connected to the first end terminal, the first end terminal being connected to a switching terminal of the shunt switch. The capacitor may have a first terminal connected to the second end terminal of the transistor stack, and a second terminal connected to a low-impedance node.

Abstract: A communication device, including a plurality of transceiver modules; a storage configured to store calibration information; and at least one processor configured to: generate a first dual-polarized RF signal by controlling a first transceiver module to generate a first RF signal based on the calibration information; measure, by a second transceiver module, a first signal power of the first dual-polarized RF signal; adjust a parameter of the first transceiver module, and generate a second dual-polarized RF signal by controlling the first transceiver module to generate a second RF signal based on the adjusted parameter; measure, by the second transceiver module, a second signal power of the second dual-polarized RF signal; and generate an aligned dual-polarized RF signal by controlling the plurality of transceiver modules to generate a plurality of RF signals based on a result of a comparison between the first signal power and the second signal power.

Abstract: A band-switching network includes a dual-band balun and a switch network. The dual-band balun includes a first output and a second output. The switch network includes a first switch and a second switch in which an input to the first switch is coupled to the first output and an input to the second switch is coupled to the second balanced output. The dual-band balun further includes a primary coil, a first secondary coil and a second secondary coil in which the first secondary coil is coupled to the first balanced output and the second secondary coil is coupled to the second balanced output. In one embodiment, the primary coil and the first secondary coil are coupled by a first coupling factor k1, and the primary coil and the second secondary coil are coupled by a second coupling factor k2 that is different from the first coupling factor k1.

Abstract: A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.

Abstract: A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.

Abstract: A shunt switch. In some embodiments, the shunt switch includes a transistor stack including a first transistor and a capacitor. The transistor stack may have a first end terminal and a second end terminal, the first transistor being connected to the first end terminal, the first end terminal being connected to a switching terminal of the shunt switch. The capacitor may have a first terminal connected to the second end terminal of the transistor stack, and a second terminal connected to a low-impedance node.

Abstract: A method of compensating for IQ mismatch (IQMM) in a transceiver may include sending first and second signals from a transmit path through a loopback path, using a phase shifter to introduce a phase shift in at least one of the first and second signals, to obtain first and second signals received by a receive path, using the first and second signals received by the receive path to obtain joint estimates of transmit and receive IQMM, at least in part, by estimating the phase shift, and compensating for IQMM using the estimates of IQMM. Using the first and second signals received by the receive path to obtain estimates of the IQMM may include processing the first and second signals received by the receive path as a function of one or more frequency-dependent IQMM parameters.

Abstract: A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.

Abstract: A shunt switch. In some embodiments, the shunt switch includes a transistor stack including a first transistor and a capacitor. The transistor stack may have a first end terminal and a second end terminal, the first transistor being connected to the first end terminal, the first end terminal being connected to a switching terminal of the shunt switch. The capacitor may have a first terminal connected to the second end terminal of the transistor stack, and a second terminal connected to a low-impedance node.

Abstract: Provided is an antenna module including: a phased array having a plurality of antennas and configured to communicate a first RF signal and a second RF signal, which are polarized in different directions; a front-end radio frequency integrated circuit (RFIC) including a first RF circuit configured to process or generate the first RF signal and a second RF circuit configured to process or generate the second RF signal; and a switch circuit configured to connect each of the first RF circuit and the second RF circuit to a first port or a second port of the antenna module according to a control signal. The first and second ports are each connectable to a back end RFIC that processes or generates a baseband signal.

Abstract: A variable gain amplifier includes a first transconductor circuit coupled to a first input terminal, a first output terminal, and a second output terminal of the variable gain amplifier, the first transconductor circuit including: a plurality of positive coefficient transistors coupled to the first output terminal and configured to selectively conduct current in response to a first binary code, a plurality of negative coefficient transistors coupled to the second output terminal and configured to selectively conduct current in response to a second binary code, and a plurality of amplifying transistors, each having a gate electrode coupled to the first input terminal, a first electrode coupled to a ground reference, and a second electrode coupled to a pair of coefficient transistors including one of the plurality of positive coefficient transistors and one of the plurality of negative coefficient transistors.

Abstract: A communication device, including a plurality of transceiver modules; a storage configured to store calibration information; and at least one processor configured to: generate a first dual-polarized RF signal by controlling a first transceiver module to generate a first RF signal based on the calibration information; measure, by a second transceiver module, a first signal power of the first dual-polarized RF signal; adjust a parameter of the first transceiver module, and generate a second dual-polarized RF signal by controlling the first transceiver module to generate a second RF signal based on the adjusted parameter; measure, by the second transceiver module, a second signal power of the second dual-polarized RF signal; and generate an aligned dual-polarized RF signal by controlling the plurality of transceiver modules to generate a plurality of RF signals based on a result of a comparison between the first signal power and the second signal power.

Abstract: A radio frequency integrated circuit (RFIC) and method of communication are provided. The RFIC includes phased-locked loop (PLL) and data stream circuitry and a plurality of tiles in communication with the PLL and data stream circuitry. The plurality of tiles includes comprising at least one tile for each frequency band of the RFIC. The plurality of tiles are configured to communicate a data stream signal between tiles in a cascading sequence. Each tile of the plurality of tiles includes a plurality of up/down conversion mixers for converting the data stream signal between an intermediate frequency (IF) and a radio frequency (RF). Each tile also includes a plurality of front end (FE) elements, each in communication with a corresponding antenna and an up/down conversion mixer of the plurality of up/down conversion mixers.

Abstract: A band-switching network includes a dual-band balun and a switch network. The dual-band balun includes a first output and a second output. The switch network includes a first switch and a second switch in which an input to the first switch is coupled to the first output and an input to the second switch is coupled to the second balanced output. The dual-band balun further includes a primary coil, a first secondary coil and a second secondary coil in which the first secondary coil is coupled to the first balanced output and the second secondary coil is coupled to the second balanced output. In one embodiment, the primary coil and the first secondary coil are coupled by a first coupling factor k1, and the primary coil and the second secondary coil are coupled by a second coupling factor k2 that is different from the first coupling factor k1.

Abstract: An electronic circuit and method are provided. The electronic circuit includes an amplifier including first cascode branch and a second cascode branch, the amplifier being configured to receive a differential input and control signals, control gate voltages in the first cascode branch and gate voltages in the second cascode branch, generate a first output signal with the first cascode branch, and generate a second output signal with the second cascode branch, and a coupler configured to perform a summation of the first output signal and the second output signal, and generate a final phase shifted output, wherein the first cascode branch or the second cascode branch includes a first cascode arm and a second cascode arm.

Abstract: A wide band matching network for power amplifier impedance matching, the wide band matching network comprising: a power amplifier transistor connected to an output network; the output network including: a series capacitor; an on-chip transformer connected to the capacitor in series, wherein the transformer and the capacitor act as a second order filter; and a port connected to the capacitor and a receiver switch.