Abstract: A frequency divider can include at least one input device receiving an input signal, the at least one input device converting the input signal to a current signal; a driver stage with at least two drivers, the at least two drivers receiving the current signal from the at least one input device; a latch stage with at least two latches receiving output signals from the driver stage, the latch stage amplifying the output signals from the driver stage in proportion to an imbalance on the driver stage; and a feedback loop feeding back latch stage output signals to the driver stage. The driver stage and the latch stage can divide the input signal such that the current signal has a frequency of a multiple of the divided signal, and the frequency divider can also include at least one output device to convert the divided signal to a divided voltage signal.

Abstract: A scalable N×N single-chip dual-band MIMO RF transceiver module compatible with the IEEE 802.11n standard for WLAN applications is provided. A modular design approach allows a transceiver of substantially any dimension to be created on a single chip that may be easily integrated with other system components. An N×N MIMO transceiver module includes N substantially identical transceiver blocks and a common local oscillator. Each transceiver block includes transmitters and receivers for transmitting and receiving signals in two distinct frequency bands. The transceiver blocks further include one or more local oscillator signal repeaters for receiving one or more local oscillator signals and forwarding the one or more local oscillator signals to subsequent transceiver blocks.

Abstract: A frequency divider can include at least one input device receiving an input signal, the at least one input device converting the input signal to a current signal; a driver stage with at least two drivers, the at least two drivers receiving the current signal from the at least one input device; a latch stage with at least two latches receiving output signals from the driver stage, the latch stage amplifying the output signals from the driver stage in proportion to an imbalance on the driver stage; and a feedback loop feeding back latch stage output signals to the driver stage. The driver stage and the latch stage can divide the input signal such that the current signal has a frequency of a multiple of the divided signal, and the frequency divider can also include at least one output device to convert the divided signal to a divided voltage signal.