Patents by Inventor Siu-Weng S. Wong

Siu-Weng S. Wong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Nitrogen doped aluminum oxide resistive random access memory
    Patent number: 8546781
    Abstract: A resistive random access memory (RRAM) device is provided that includes a first electrode, a second electrode, and a resistance-change film disposed between the first electrode and the second electrode, where the resistance-change film includes an atomic ratio of aluminum, oxygen and nitrogen.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: October 1, 2013
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Siu-Weng S. Wong, Wanki Kim, Zhiping Zhang, Sung Il Park
  • Nitrogen Doped Aluminum Oxide Resistive Random Access Memory
    Publication number: 20120305881
    Abstract: A resistive random access memory (RRAM) device is provided that includes a first electrode, a second electrode, and a resistance-change film disposed between the first electrode and the second electrode, where the resistance-change film includes an atomic ratio of aluminum, oxygen and nitrogen.
    Type: Application
    Filed: May 11, 2012
    Publication date: December 6, 2012
    Inventors: Siu-Weng S. Wong, Wanki Kim, Zhiping Zhang, Sung Il Park
  • Integrated circuit device having improved junction connections
    Patent number: 5121186
    Abstract: A method for forming a contact to a selective region of an integrated circuit characterized by the steps of: forming a layer of refractory metal over and around the selected region; forming a layer of amorphous silicon over the layer of refractory metal; patterning the amorphous silicon in to an elongated strip which extends away from the selected region; annealing the integrated circuit to convert the strip of amorphous silicon into a silicide path; and removing the unreacted refractory metal. The method of the present invention can be used to extend a contact to the source, drain, or gate of a MOSFET from the top of an adjacent section of field oxide, and can also be used as a method for local interconnection of IC devices, such as CMOS devices.
    Type: Grant
    Filed: October 23, 1990
    Date of Patent: June 9, 1992
    Assignee: Hewlett-Packard Company
    Inventors: Siu-Weng S. Wong, Devereaux C. Chen, Kuang-Yi Chiu
  • Method for making silicide interconnection structures for integrated circuit devices
    Patent number: 4873204
    Abstract: A method for forming a contact to a selective region of an integrated circuit characterized by the steps of: forming a layer of refractory metal over and around the selected region; forming a layer of amorphous silicon over the layer of refractory metal; patterning the amorphous silicon into an elongated strip which extends away from the selected region; annealing the integrated circuit to convert the strip of amorphous silicon into a silicide path; and removing the unreacted refractory metal. The method of the present invention can be used to extend a contact to the source, drain, or gate of a MOSFET from the top of an adjacent section of field oxide, and can also be used as a method for local interconnection of IC devices, such as CMOS devices.
    Type: Grant
    Filed: November 8, 1988
    Date of Patent: October 10, 1989
    Assignee: Hewlett-Packard Company
    Inventors: Siu-Weng S. Wong, Devereaux C. Chen, Kuang-Yi Chiu