Abstract: An integrated egress/replay memory structure is provided with split rate write and read ports and means for managing at least three types of data moving into, through and/or out of the integrated memory structure, namely: (1) currently egressing packet data; (2) replay data; and (3) to-be egressed data. Additionally, a shared free space (4) is managed between the storage areas of the (2) replay data and (3) the to-be egressed data. The to-be egressed data (PdBx) is allowed to enter into (to be written into) a front-end raceway portion of the integrated memory structure at a rate which can be substantially greater than that allowed for corresponding egressing packet data (PdUx). Thus, even when egressing packet data that is ahead in line is shifting out toward a slow rate egress port; this slowing factor does not slow the speed at which the to-be egressed data (PdBx) can be shifted into the front-end raceway portion.

Abstract: In PCI-Express and alike network systems, back-up copies of recently sent packets are kept in a replay buffer for resending if the original packet is not well received by an intended destination device. A method for locating the back-up copy in the retry buffer comprises applying a less significant portion of the sequence number of a to-be-retrieved back-up copy to an index table to obtain a start address or other locater indicating where in the retry buffer the to-be-retrieved back-up copy resides. A method for skipping replay of late nullified packets includes deleting from the index table, references to late nullified packets.

Abstract: An integrated egress/replay memory structure is provided with split rate write and read ports and means for managing at least three types of data moving into, through and/or out of the integrated memory structure, namely: (1) currently egressing packet data; (2) replay data; and (3) to-be egressed data. Additionally, a shared free space (4) is managed between the storage areas of the (2) replay data and (3) the to-be egressed data. The to-be egressed data (PdBx) is allowed to enter into (to be written into) a front-end raceway portion of the integrated memory structure at a rate which can be substantially greater than that allowed for corresponding egressing packet data (PdUx). Thus, even when egressing packet data that is ahead in line is shifting out toward a slow rate egress port, this slowing factor does not slow the speed at which the to-be egressed data (PdBx) can be shifted into the front-end raceway portion.

Abstract: In PCI-Express and alike network systems, back-up copies of recently sent packets are kept in a replay buffer for resending if the original packet is not well received by an intended destination device. A method for locating the back-up copy in the retry buffer comprises applying a less significant portion of the sequence number of a to-be-retrieved back-up copy to an index table to obtain a start address or other locater indicating where in the retry buffer the to-be-retrieved back-up copy resides. A method for skipping replay of late nullified packets includes deleting from the index table, references to late nullified packets.

Abstract: An integrated egress/replay memory structure is provided with split rate write and read ports and means for managing at least three types of data moving into, through and/or out of the integrated memory structure, namely: (1) currently egressing packet data; (2) replay data; and (3) to-be egressed data. Additionally, a shared free space (4) is managed between the storage areas of the (2) replay data and (3) the to-be egressed data. The to-be egressed data (PdBx) is allowed to enter into (to be written into) a front-end raceway portion of the integrated memory structure at a rate which can be substantially greater than that allowed for corresponding egressing packet data (PdUx). Thus, even when egressing packet data that is ahead in line is shifting out toward a slow rate egress port, this slowing factor does not slow the speed at which the to-be egressed data (PdBx) can be shifted into the front-end raceway portion.

Abstract: An integrated egress/replay memory structure is provided with split rate write and read ports and means for managing at least three types of data moving into, through and/or out of the integrated memory structure, namely: (1) currently egressing packet data; (2) replay data; and (3) to-be egressed data. Additionally, a shared free space (4) is managed between the storage areas of the (2) replay data and (3) the to-be egressed data. The to-be egressed data (PdBx) is allowed to enter into (to be written into) a front-end raceway portion of the integrated memory structure at a rate which can be substantially greater than that allowed for corresponding egressing packet data (PdUx). Thus, even when egressing packet data that is ahead in line is shifting out toward a slow rate egress port; this slowing factor does not slow the speed at which the to-be egressed data (PdBx) can be shifted into the front-end raceway portion.

Abstract: In PCI-Express and alike network systems, back-up copies of recently sent packets are kept in a retry buffer for resending if the original packet is not well received by an intended destination device. A method for locating the back-up copy in the retry buffer comprises applying a less significant portion of the sequence number of a to-be-retrieved back-up copy to an index table to obtain a start address or other locater indicating where in the retry buffer the to-be-retrieved back-up copy resides.