Patents by Inventor Siva K. Chinthu

Siva K. Chinthu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11966240
    Abstract: An apparatus includes an amplifier, a pass transistor connected to a load and to an input of the amplifier, and a capacitor connected between the amplifier and the pass transistor.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: April 23, 2024
    Assignee: GlobalFoundries U.S. Inc.
    Inventors: Siva K. Chinthu, Veerendranath P. Sundar
  • Publication number: 20230341881
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a LDO regulator circuit and methods of manufacture. The structure includes a comparator connected to a first transistor of a low drop-out (LDO) circuit; a second transistor connected to the first transistor; and a feedback loop connected to the first transistor and an output of the LDO circuit.
    Type: Application
    Filed: April 25, 2022
    Publication date: October 26, 2023
    Inventors: Siva K. CHINTHU, Suresh PASUPULA, Devesh DWIVEDI, Kevin A. Batson
  • Publication number: 20230137946
    Abstract: An apparatus includes an amplifier, a pass transistor connected to a load and to an input of the amplifier, and a capacitor connected between the amplifier and the pass transistor.
    Type: Application
    Filed: November 3, 2021
    Publication date: May 4, 2023
    Applicant: GlobalFoundries U.S. Inc.
    Inventors: Siva K. Chinthu, Veerendranath P. Sundar
  • Patent number: 11569738
    Abstract: Disclosed is a multi-stage charge pump. A first stage is controlled by a first clock signal. A second stage is controlled by a second clock signal, which has high and low states that are shifted relative to the high and low states of the first clock signal. The high and low states of the second clock signal can be higher than the high and low states, respectively, of the first clock signal for a positive charge pump and vice versa for a negative charge pump. Any additional stage is similarly controlled by an additional clock signal that is shifted with respect to the clock signal controlling the immediately preceding stage. By shifting the high and low states of clock signals controlling downstream stages, the need for series-connected or high voltage capacitors in the downstream stages is eliminated and circuit complexity and area consumption are reduced.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: January 31, 2023
    Assignee: GlobalFoundries U.S. Inc.
    Inventor: Siva K. Chinthu