Patents by Inventor Siva Narendra

Siva Narendra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080093467
    Abstract: A sleeve provides communications between an electronic transaction card and an intelligent electronic device. The intelligent electronic device may be a mobile phone or other device with or without network connectivity. The electronic transaction card may have magnetic field producing circuitry compatible with magnetic card readers, smartcard circuitry, other point-of-sale interfaces, or any combination thereof.
    Type: Application
    Filed: December 13, 2007
    Publication date: April 24, 2008
    Inventors: Siva Narendra, Prabhakar Tadepalli, Thomas Spitzer
  • Publication number: 20070260848
    Abstract: An integrated circuit (IC) package is disclosed. The IC package includes a first die; and a second die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: July 3, 2007
    Publication date: November 8, 2007
    Inventors: Siva Narendra, James Tschanz, Howard Wilson, Donald Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek De, Shekhar Borkar
  • Publication number: 20070130485
    Abstract: A system may include acquisition of a supply voltage information representing past supply voltages supplied to an electrical component, acquisition of a temperature information representing past temperatures of the electrical component, and control of a performance characteristic of the electrical component based on the supply voltage information and the temperature information. Some embodiments may further include determination of a reliability margin based on the supply voltage information, the temperature information, and on a reliability specification of the electrical component, and change of the performance characteristic based on the reliability margin.
    Type: Application
    Filed: December 6, 2005
    Publication date: June 7, 2007
    Inventors: Siva Narendra, James Tschanz, Vivek De, Stephen Tang
  • Patent number: 7202648
    Abstract: An fully integrated DC-to-DC switching converter having an inductor, where the inductor has magnetic material that may be amorphous CoZrTa, CoFeHfO, CoAlO, FeSiO, CoFeAlO, CoNbTa, CoZr, and other amorphous cobalt alloys. The magnetic material allows for a relatively high switching frequency. In one embodiment, the inductor has two sub-structures, where each of the two sub-structures are parallel to each other and each includes a conductor having upper and lower portions. The conductors of the two sub-structures are electrically connected to each other, and the upper and lower portions are arranged so that magnetic flux from one of the sub-structures couples with the magnetic flux from the other sub-structure so as to provide a relatively high inductance with small form factor. In another embodiment, the inductor is a simple conductor surrounded by high-frequency magnetic material. In both structures, oxide insulates the conductors from the magnetic material.
    Type: Grant
    Filed: May 5, 2003
    Date of Patent: April 10, 2007
    Assignee: Intel Corporation
    Inventors: Donald S. Gardner, Volkan Kursun, Siva Narendra
  • Publication number: 20070024322
    Abstract: A method and system for leakage current reduction in domino circuits is described. The system includes a domino circuit with a dynamic gate, a static gate, and a standby signal to set the domino circuit to an evaluate phase during an inactive mode. The inputs to the static gate are set to low and the inputs to the dynamic gate are set to high during the inactive mode. The standby signal may be an input to a device in the dynamic gate or an input to a latch coupled to the dynamic gate.
    Type: Application
    Filed: August 1, 2005
    Publication date: February 1, 2007
    Inventors: Yibin Ye, Siva Narendra, Vivek De
  • Publication number: 20070023532
    Abstract: An electronic stripe card senses when it is being swiped passed a read head, and drives a conductive path to mimic a magnetic card track. Multiple conductive paths may be driven in an interleaved fashion one after another. The card may include multiple swipe sensors to detect when to start and stop driving the conductive paths. The conductive paths may include traces on a top metal layer and bottom metal layer without magnetic material therebetween.
    Type: Application
    Filed: July 18, 2006
    Publication date: February 1, 2007
    Inventors: Siva Narendra, Prabhakar Tadepalli, Thomas Spitzer
  • Publication number: 20070014408
    Abstract: A device uses a user authentication factor to generate an asymmetric decryption key for use in cryptography. An asymmetric encryption key is generated from the asymmetric decryption key using a one-way function, and the asymmetric encryption key is used to encrypt a symmetric key.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 18, 2007
    Inventors: Siva Narendra, Prabhakar Tadepalli, Thomas Spitzer
  • Publication number: 20070014407
    Abstract: A device uses a user authentication factor to generate a symmetric key for use in symmetric cryptography. The user authentication factor is encrypted and stored for authentication during decryption.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 18, 2007
    Inventors: Siva Narendra, Prabhakar Tadepalli, Thomas Spitzer
  • Publication number: 20070016798
    Abstract: A device uses a user authentication factor to generate a decryption key for use in asymmetric cryptography. An encryption key is generated from the decryption key using a one-way function.
    Type: Application
    Filed: July 15, 2005
    Publication date: January 18, 2007
    Inventors: Siva Narendra, Prabhakar Tadepalli, Thomas Spitzer
  • Publication number: 20060226217
    Abstract: A sleeve provides communications between an electronic transaction card and an intelligent electronic device. The intelligent electronic device may be a mobile phone or other device with or without network connectivity. The electronic transaction card may have magnetic field producing circuitry compatible with magnetic card readers, smartcard circuitry, other point-of-sale interfaces, or any combination thereof.
    Type: Application
    Filed: April 7, 2005
    Publication date: October 12, 2006
    Inventors: Siva Narendra, Prabhakar Tadepalli, Thomas Spitzer
  • Publication number: 20060226863
    Abstract: A method and apparatus are provided for adjusting a frequency of a die. This may include measuring characteristics of a die at various combinations of power supply voltage, body bias voltage and/or temperature and determining operating characteristics, such as power supply voltage and body bias voltage, based on the measured characteristics.
    Type: Application
    Filed: March 31, 2005
    Publication date: October 12, 2006
    Inventors: Siva Narendra, James Tschanz, Victor Zia, Badarinath Kommandur, Tawfik Arabi, Grant McFarland, Vivek De
  • Publication number: 20060186209
    Abstract: An electronic transaction card communicates with an add-on slot of an intelligent electronic device. The add-on slot may be a memory card slot. The intelligent electronic device may be a mobile phone or other device with or without network connectivity. The electronic transaction card may have magnetic field producing circuitry compatible with magnetic card readers, smartcard circuitry, other point-of-sale interfaces, or any combination thereof.
    Type: Application
    Filed: February 22, 2005
    Publication date: August 24, 2006
    Inventors: Siva Narendra, Thomas Spitzer, Prabhakar Tadepalli
  • Publication number: 20060164152
    Abstract: A bias generator is provided that includes a central bias generator to provide a first bias voltage and a local bias generator to receive the first bias voltage and to provide a second bias voltage. The central bias generator may include a replica bias generator circuit substantially corresponding to the local bias generator.
    Type: Application
    Filed: January 21, 2005
    Publication date: July 27, 2006
    Inventors: James Tschanz, Stephen Tang, Victor Zia, Badarinath Kommandur, Siva Narendra, Vivek De
  • Publication number: 20060164157
    Abstract: A bias generator unit is provided that includes a central bias generator to provide a bias voltage, a local bias generator to receive the bias voltage and a reference voltage and to provide a forward body bias signal or a reverse body bias signal. The bias generator may include a charge pump to output (or provide) a reference voltage to a reference generator, which in turn provides reference signals to the central bias generator. As a result, the local bias generator may control the body bias signal provided by the local bias generator.
    Type: Application
    Filed: January 21, 2005
    Publication date: July 27, 2006
    Inventors: James Tschanz, Stephen Tang, Victor Zia, Badarinath Kommandur, Siva Narendra, Vivek De
  • Publication number: 20060132218
    Abstract: In some embodiments, a chip is provided that comprises a group of transistors and a body bias generator. The group of transistors is coupled to the body bias generator. The body bias generator is configured to body bias the transistors at a level based on one or more measured parameters associated with the chip and on an operating mode. Other embodiments are disclosed herein and/or are otherwise claimed.
    Type: Application
    Filed: December 20, 2004
    Publication date: June 22, 2006
    Inventors: James Tschanz, Siva Narendra, Vivek De
  • Publication number: 20060132187
    Abstract: In some embodiments, a circuit is provided that comprises a dynamic circuit and a body bias circuit. The dynamic circuit has a keeper transistor. The body bias circuit is coupled to the keeper transistor and is configured to body bias the keeper transistor in accordance with a leakage associated with the dynamic circuit. Other embodiments are disclosed herein.
    Type: Application
    Filed: December 20, 2004
    Publication date: June 22, 2006
    Inventors: James Tschanz, Ram Krishnamurthy, Siva Narendra, Vivek De
  • Publication number: 20060099734
    Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: September 30, 2004
    Publication date: May 11, 2006
    Inventors: Siva Narendra, Howard Wilson, Donald Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek De, Shekhar Borkar
  • Publication number: 20060091935
    Abstract: Apparatuses and methods for delaying thermal throttling of processor devices by decreasing threshold voltages are disclosed.
    Type: Application
    Filed: November 3, 2004
    Publication date: May 4, 2006
    Inventors: James Tschanz, Stephen Tang, Siva Narendra, Vivek De
  • Publication number: 20060071650
    Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a voltage regulator/converter die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 6, 2006
    Inventors: Siva Narendra, Howard Wilson, Donald Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek De, Shekhar Borkar
  • Publication number: 20060071648
    Abstract: A central processing unit (CPU) is disclosed. The CPU includes a CPU die; and a power management die bonded to the CPU die in a three dimensional packaging layout.
    Type: Application
    Filed: September 30, 2004
    Publication date: April 6, 2006
    Inventors: Siva Narendra, James Tschanz, Howard Wilson, Donald Gardner, Peter Hazucha, Gerhard Schrom, Tanay Karnik, Nitin Borkar, Vivek De, Shekhar Borkar