Patents by Inventor Siva Rama K. Pullelli

Siva Rama K. Pullelli has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9665115
    Abstract: A three-dimensional (3D) integrated circuit (IC) device can include a first die having a first supply line and a second die having a second supply line, a power header, and a voltage selection logic. The power header can be connected to the first die and the second die and configured to generate a first voltage on a first voltage line and a second voltage on a second voltage line. The voltage selection logic can be connected to the first supply line and the second supply line and configured to select between the first voltage line and the second voltage line for each of the first supply line and the second supply line.
    Type: Grant
    Filed: February 12, 2016
    Date of Patent: May 30, 2017
    Assignee: International Business Machines Corporation
    Inventors: Vijay A. Mathiyalagan, Siva Rama K. Pullelli, Saravanan Sethuraman, Kenneth L. Wright
  • Publication number: 20160161962
    Abstract: The present disclosure includes a three dimensional (3D) integrated device comprising a first die having a first supply line and a second die having a second supply line, a power header, and voltage selection logic. The power header is connected to the first die and the second die and configured to generate a first voltage on a first voltage line and a second voltage on a second voltage line. The voltage selection logic is connected to the first supply line and the second supply line and configured to select between the first voltage line and the second voltage line for each of the first supply line and the second supply line.
    Type: Application
    Filed: February 12, 2016
    Publication date: June 9, 2016
    Inventors: Vijay A. Mathiyalagan, Siva Rama K. Pullelli, Saravanan Sethuraman, Kenneth L. Wright
  • Patent number: 9298201
    Abstract: The present disclosure includes a three dimensional (3D) integrated device comprising a first die having a first supply line and a second die having a second supply line, a power header, and voltage selection logic. The power header is connected to the first die and the second die and configured to generate a first voltage on a first voltage line and a second voltage on a second voltage line. The voltage selection logic is connected to the first supply line and the second supply line and configured to select between the first voltage line and the second voltage line for each of the first supply line and the second supply line.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 29, 2016
    Assignee: International Business Machines Corporation
    Inventors: Vijay A. Mathiyalagan, Siva Rama K. Pullelli, Saravanan Sethuraman, Kenneth L. Wright
  • Publication number: 20150168972
    Abstract: The present disclosure includes a three dimensional (3D) integrated device comprising a first die having a first supply line and a second die having a second supply line, a power header, and voltage selection logic. The power header is connected to the first die and the second die and configured to generate a first voltage on a first voltage line and a second voltage on a second voltage line. The voltage selection logic is connected to the first supply line and the second supply line and configured to select between the first voltage line and the second voltage line for each of the first supply line and the second supply line.
    Type: Application
    Filed: December 18, 2013
    Publication date: June 18, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Vijay A. Mathiyalagan, Siva Rama K. Pullelli, Saravanan Sethuraman, Kenneth L. Wright