Patents by Inventor Siyad Ma

Siyad Ma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230023859
    Abstract: Artificial intelligence is an increasingly important sector of the computer industry. However, artificial intelligence is extremely computationally intensive field such that it can be expensive, time consuming, and energy consuming. Fortunately, many of the calculations required for artificial intelligence can be performed in parallel such that specialized processors can great increase computational performance. Specifically, artificial intelligence generally requires large numbers of matrix operations to implement neural networks such that specialized matrix processor circuits can improve performance. To perform all these matrix operations, the matrix processor circuits must be quickly and efficiently supplied with data to process or else the matrix processor circuits end up idle or spending large amounts of time loading in different weight matrix data.
    Type: Application
    Filed: June 23, 2022
    Publication date: January 26, 2023
    Inventors: Siyad Ma, Shang-Tse Chuang, Sharad Chole
  • Patent number: 6598132
    Abstract: A traffic manager for a network switch port includes a buffer memory and a buffer manager for writing incoming cells into the buffer memory and for thereafter reading the cells out of the buffer memory and forwarding them. The traffic manager also includes a queue manager for determining an order in which the buffer manager is to forward a set of cells stored in the buffer memory. The queue manager supplies the buffer manager with a sequence of pointers, each pointer referencing a separate cell of the set of cells, with the sequence of pointers being ordered to indicate an order in which the buffer manager is to forward the set of cells. After receiving the pointer sequence, the buffer manager changes the order of pointers in the pointer sequence to optimize a rate at which it can read the cells out of the buffer memory.
    Type: Grant
    Filed: July 18, 2001
    Date of Patent: July 22, 2003
    Assignee: Zettacom, Inc.
    Inventors: Toan D. Tran, Robert J. Divivier, Siyad Ma
  • Publication number: 20030084246
    Abstract: A traffic manager for a network switch port includes a buffer memory and a buffer manager for writing incoming cells into the buffer memory and for thereafter reading the cells out of the buffer memory and forwarding them. The traffic manager also includes a queue manager for determining an order in which the buffer manager is to forward a set of cells stored in the buffer memory. The queue manager supplies the buffer manager with a sequence of pointers, each pointer referencing a separate cell of the set of cells, with the sequence of pointers being ordered to indicate an order in which the buffer manager is to forward the set of cells. After receiving the pointer sequence, the buffer manager changes the order of pointers in the pointer sequence to optimize a rate at which it can read the cells out of the buffer memory.
    Type: Application
    Filed: July 18, 2001
    Publication date: May 1, 2003
    Inventors: Toan D. Tran, Robert J. Divivier, Siyad Ma