Patents by Inventor Sizhe LIU

Sizhe LIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240179911
    Abstract: In an example, a memory device includes a first stack structure and a second stack structure over the first stack structure. Each of the first stack structure and the second stack structure includes alternately stacked conductor layers and first insulating layers. The memory device also includes a first channel structure extending through the first stack structure, and a second channel structure extending through the second stack structure and connected with the first channel structure. A width of an end of the first channel structure closer to the second channel structure is greater than that of the second channel structure closer to the first channel structure. The memory device further includes a pillar structure extending through the first stack structure and the second stack structure. The pillar structure includes a metal layer.
    Type: Application
    Filed: February 7, 2024
    Publication date: May 30, 2024
    Inventors: Jun LIU, Zongliang HUO, Li Hong XIAO, Zhenyu LU, Qian TAO, Yushi HU, Sizhe LI, Zhao Hui TANG, Yu Ting ZHOU, Zhaosong LI
  • Patent number: 11968832
    Abstract: Methods and structures of a three-dimensional memory device are disclosed. In an example, the disclosed method comprises forming a plurality of dielectric stacks stacked on one another over a substrate to create a multiple-stack staircase structure. Each one of the plurality of dielectric stacks comprises a plurality of dielectric pairs arranged along a direction perpendicular to a top surface of the substrate. The method further comprises forming a filling structure that surrounds the multiple-stack staircase structure, forming a semiconductor channel extending through the multiple-staircase structure, wherein the semiconductor channel comprises unaligned sidewall surfaces, and forming a supporting pillar extending through at least one of the multiple-staircase structure and the filling structure, wherein the supporting pillar comprises aligned sidewall surfaces.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: April 23, 2024
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Jun Liu, Zongliang Huo, Li Hong Xiao, Zhenyu Lu, Qian Tao, Yushi Hu, Sizhe Li, Zhao Hui Tang, Yu Ting Zhou, Zhaosong Li
  • Publication number: 20150379532
    Abstract: A method and system for identifying bad commodities based on user purchase behaviors is disclosed. In one aspect, the method includes selecting, by a user screening module a set of users who only perform a single shopping behavior within a specific time period and constructing, by the user screening module, a user-commodity purchase relationship matrix based on the set of users and specifications of the commodities purchased by all the customers. The method also includes calculating, by an identifying module and based on the user-commodity purchase relationship matrix, a probability that a commodity is bad to identify bad commodities, generating, by the identifying module, a list of bad commodities based on the identified bad commodities, and providing, by a pushing module, the generated list of bad commodities to a commodity intervention system.
    Type: Application
    Filed: June 10, 2015
    Publication date: December 31, 2015
    Inventors: Sizhe LIU, Zhi HE