Patents by Inventor SM M. RAHMAN

SM M. RAHMAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9766683
    Abstract: A processor includes at least one core, a power control unit, and a first interconnect to couple with a peripheral controller. The first interconnect is to provide a first uni-directional communication path for communication of first power management data from the processor to the peripheral controller. Other embodiments are described and claimed.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: September 19, 2017
    Assignee: Intel Corporation
    Inventors: Shaun M. Conrad, William Knolla, Douglas R. Moran, Sm M. Rahman, Jawad Haj-Yihia, Alon Naveh, Ohad Falik
  • Publication number: 20170010648
    Abstract: A processor includes at least one core, a power control unit, and a first interconnect to couple with a peripheral controller. The first interconnect is to provide a first uni-directional communication path for communication of first power management data from the processor to the peripheral controller. Other embodiments are described and claimed.
    Type: Application
    Filed: September 20, 2016
    Publication date: January 12, 2017
    Inventors: Shaun M. Conrad, William Knolla, Douglas R. Moran, Sm M. Rahman, Jawad Haj-Yihia, Alon Naveh, Ohad Falik
  • Patent number: 9477627
    Abstract: A processor includes at least one core, a power control unit, and a first interconnect to couple with a peripheral controller. The first interconnect is to provide a first uni-directional communication path for communication of first power management data from the processor to the peripheral controller. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 26, 2012
    Date of Patent: October 25, 2016
    Assignee: Intel Corporation
    Inventors: Shaun M. Conrad, William Knolla, Douglas R. Moran, SM M. Rahman, Jawad Haj-Yihia, Alon Naveh, Ohad Falik
  • Publication number: 20140181352
    Abstract: A processor includes at least one core, a power control unit, and a first interconnect to couple with a peripheral controller. The first interconnect is to provide a first uni-directional communication path for communication of first power management data from the processor to the peripheral controller. Other embodiments are described and claimed.
    Type: Application
    Filed: December 26, 2012
    Publication date: June 26, 2014
    Inventors: Shaun M. Conrad, William Knolla, Douglas R. Moran, SM M. RAHMAN, JAWAD HAJ-YIHIA, ALON NAVEH, OHAD FALIK