Patents by Inventor Smita Kumar

Smita Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128982
    Abstract: A hardware accelerator device is provided with circuitry to perform one or more reversible data transforms on data based on a request and compress the transformed data to generate compressed transformed data. The hardware accelerator device generates an output including the compressed transformed data and transform metadata indicating the set of reversible data transforms applied to the compressed transformed data.
    Type: Application
    Filed: December 27, 2023
    Publication date: April 18, 2024
    Applicant: Intel Corporation
    Inventors: Smita Kumar, Patrick Fleming
  • Publication number: 20230342206
    Abstract: An accelerator or system including an accelerator can include an input interface to receive input data to be compressed and user application parameters for invocation of compression. The accelerator can include circuitry to identify a compression algorithm from configuration data provided with the input data. The user application parameters may not include parameters specifying entropy thresholds for compression of the input data. The circuitry can generate headers specific to the compression algorithm. The circuitry can generate uncompressed data blocks comprising blocks of the input data and corresponding headers. The circuitry can determine whether to provide the uncompressed data blocks or compressed data blocks based at least in part on entropy of the input data. Other methods, systems, and apparatuses are described.
    Type: Application
    Filed: June 27, 2023
    Publication date: October 26, 2023
    Inventors: Laurent Coquerel, Fei Wang, Smita Kumar, Phani Krishna Sagiraju, John J. Browne
  • Publication number: 20220368348
    Abstract: An accelerator device determines a compression format based on a header of a structured data element to be decompressed. The accelerator device may configure the accelerator device based on the compression format. The accelerator device may decompress a data block of the structured data element based on the configuration.
    Type: Application
    Filed: July 21, 2022
    Publication date: November 17, 2022
    Applicant: INTEL CORPORATION
    Inventors: Laurent Coquerel, Fei Wang, John Browne, Smita Kumar, Declan Doherty, Marlow Weston, Reshma Pattan
  • Patent number: 11431351
    Abstract: A compression scheme can be selected for an input data stream based on characteristics of the input data stream. For example, when the input data stream is searched for pattern matches, input stream characteristics used to select a compression scheme can include one or more of: type and size of an input stream, a length of a pattern, a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, a gap between two pattern matches (including different or same patterns), standard deviation of a length of a pattern, standard deviation of a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, or standard deviation of a gap between two pattern matches. Criteria can be established whereby one or more characteristics are used to select a particular encoding scheme.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: August 30, 2022
    Assignee: Intel Corporation
    Inventors: David K. Cassetti, Stephen T. Palermo, Sailesh Bissessur, Patrick Fleming, Lokpraveen Mosur, Smita Kumar, Pradnyesh S. Gudadhe, Naveen Lakkakula, Brian Will, Atul Kwatra
  • Publication number: 20210135685
    Abstract: Examples described herein relate to an encoder circuitry to apply one of multiple lossless data compression schemes on input data. In some examples, to compress input data, the encoder circuitry is to utilize a search window size and number of searches based on an applied compression scheme. In some examples, content of a memory is reconfigured to store data corresponding to a search window size of the applied compression scheme. In some examples, an applicable hash function is configured based on the applied compression scheme. In some examples, a number of searches are made for a byte position. In some examples, the encoder circuitry includes a hash table look-up and a bank decoder. In some examples, the hash table look-up is to generate a hash index to identify an address of an entry in the search window. In some examples, the bank decoder is to select a bank based on the hash index.
    Type: Application
    Filed: December 11, 2020
    Publication date: May 6, 2021
    Inventors: Smita KUMAR, Sailesh BISSESSUR, David K. CASSETTI, Stephen T. PALERMO
  • Patent number: 10680643
    Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: David K. Cassetti, Stephen T. Palermo, Sailesh Bissessur, Patrick Fleming, Lokpraveen Mosur, Smita Kumar, Pradnyesh S. Gudadhe, Naveen Lakkakula, Brian Will, Atul Kwatra
  • Patent number: 10547325
    Abstract: An embodiment of a semiconductor package apparatus may include technology to load compressed symbols in a data stream into a first content accessible memory, break a serial dependency of the compressed symbols in the compressed data stream, and decode more than one symbol per clock. Other embodiments are disclosed and claimed.
    Type: Grant
    Filed: August 16, 2018
    Date of Patent: January 28, 2020
    Assignee: Intel Corporation Intel IP Corporation
    Inventors: Smita Kumar, Sudhir Satpathy, Chris Cunningham
  • Publication number: 20190273507
    Abstract: In connection with compression of an input stream, multiple portions of the input stream are searched against previously received portions of the input stream to find any matches of character strings in the previously received portions of the input stream. In some cases, matches of longer character strings, as opposed to shorter character strings, can be selected for inclusion in an encoded stream that is to be compressed. Delayed selection can occur whereby among multiple matches, a match that is longer can be selected for inclusion in the encoded stream and non-selected a character string match is reverted to a literal. A search engine that is searching an input stream to identify a repeat pattern of characters can cease to search for characters that were included in the selected character string match.
    Type: Application
    Filed: March 8, 2019
    Publication date: September 5, 2019
    Inventors: David K. CASSETTI, Stephen T. PALERMO, Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL, Atul KWATRA
  • Publication number: 20190207624
    Abstract: A compression scheme can be selected for an input data stream based on characteristics of the input data stream. For example, when the input data stream is searched for pattern matches, input stream characteristics used to select a compression scheme can include one or more of: type and size of an input stream, a length of a pattern, a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, a gap between two pattern matches (including different or same patterns), standard deviation of a length of a pattern, standard deviation of a distance from a start of where the pattern is to be inserted to the beginning of where the pattern occurred previously, or standard deviation of a gap between two pattern matches. Criteria can be established whereby one or more characteristics are used to select a particular encoding scheme.
    Type: Application
    Filed: March 8, 2019
    Publication date: July 4, 2019
    Inventors: David K. CASSETTI, Stephen T. PALERMO, Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL, Atul KWATRA
  • Publication number: 20190123763
    Abstract: A compression engine includes sets of independent search engines. The sets of independent search engines concurrently perform searches for a longest match in a stream of uncompressed data. The searches are distributed amongst the sets of independent search engines on byte boundaries to load balance the use of the search engines.
    Type: Application
    Filed: December 20, 2018
    Publication date: April 25, 2019
    Inventors: Sailesh BISSESSUR, Patrick FLEMING, Lokpraveen MOSUR, David K. CASSETTI, Stephen T. PALERMO, Smita KUMAR, Pradnyesh S. GUDADHE, Naveen LAKKAKULA, Brian WILL
  • Publication number: 20190044534
    Abstract: An embodiment of a semiconductor package apparatus may include technology to load compressed symbols in a data stream into a first content accessible memory, break a serial dependency of the compressed symbols in the compressed data stream, and decode more than one symbol per clock. Other embodiments are disclosed and claimed.
    Type: Application
    Filed: August 16, 2018
    Publication date: February 7, 2019
    Inventors: Smita Kumar, Sudhir Satpathy, Chris Cunningham