Patents by Inventor Snezana Jenei
Snezana Jenei has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9583444Abstract: A method for applying a magnetic shielding layer to a substrate is provided, wherein a first magnetic shielding layer is adhered to a first surface of the substrate. A first film layer is adhered to the first magnetic shielding layer and the first magnetic shielding layer is more adherent to the first surface than the film layer to the first magnetic shielding layer.Type: GrantFiled: August 20, 2013Date of Patent: February 28, 2017Assignee: Infineon Technologies AGInventors: Christian Peters, Robert Allinger, Klaus Knobloch, Snezana Jenei
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Publication number: 20150054102Abstract: A method for applying a magnetic shielding layer to a substrate is provided, wherein a first magnetic shielding layer is adhered to a first surface of the substrate. A first film layer is adhered to the first magnetic shielding layer and the first magnetic shielding layer is more adherent to the first surface than the film layer to the first magnetic shielding layer.Type: ApplicationFiled: August 20, 2013Publication date: February 26, 2015Inventors: Christian Peters, Robert Allinger, Klaus Knobloch, Snezana Jenei
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Patent number: 8748287Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.Type: GrantFiled: September 13, 2013Date of Patent: June 10, 2014Assignee: Infineon Technologies AGInventors: Hans-Joachim Barth, Andre Hanke, Snezana Jenei, Oliver Nagy, Jiro Morinaga, Bernd Adler, Heinrich Koerner
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Publication number: 20140017876Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.Type: ApplicationFiled: September 13, 2013Publication date: January 16, 2014Inventors: Hans-Joachim Barth, Andre Hanke, Snezana Jenei, Oliver Nagy, Jiro Morinaga, Bernd Adler, Heinrich Koerner
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Patent number: 8587055Abstract: In an embodiment, an apparatus includes a source region, a gate region and a drain region supported by a substrate, and a drift region including a plurality of vertically extending n-wells and p-wells to couple the gate region and the drain region of a transistor, wherein the plurality of n-wells and p-wells are formed in alternating longitudinal rows to form a superjunction drift region longitudinally extending between the gate region and the drain region of the transistor.Type: GrantFiled: February 23, 2007Date of Patent: November 19, 2013Assignee: Infineon Technologies AGInventors: Martin Stiftinger, Snezana Jenei, Wolfgang Werner, Uwe Hodel
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Patent number: 8536683Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.Type: GrantFiled: March 1, 2011Date of Patent: September 17, 2013Assignee: Infineon Technologies AGInventors: Hans-Joachim Barth, Andre Hanke, Snezana Jenei, Oliver Nagy, Jiro Morinaga, Bernd Adler, Heinrich Koerner
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Publication number: 20130009215Abstract: Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.Type: ApplicationFiled: September 14, 2012Publication date: January 10, 2013Applicant: Infineon Technologies AGInventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Patent number: 8318553Abstract: Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.Type: GrantFiled: January 7, 2011Date of Patent: November 27, 2012Assignee: Infineon Technologies AGInventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Patent number: 8310027Abstract: Embodiments relate to a bipolar transistor that includes a body region having a fin structure. At least one terminal region may be formed over at least a portion of the body region. The at least one terminal region may be formed as an epitaxially grown region. Embodiments also relate to a vertically integrated electronic device that includes a first terminal region, a second terminal region and a third terminal region. The second terminal region may be arranged over at least a portion of the third terminal region, and at least two of the first, second and third terminal regions may be formed as epitaxially grown regions.Type: GrantFiled: June 12, 2008Date of Patent: November 13, 2012Assignee: Infineon Technologies AGInventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Patent number: 8178953Abstract: A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The system on chip further includes second redistribution lines disposed above the RF component, the second redistribution lines coupled to ground potential nodes. The second redistribution lines include a first set of parallel metal lines coupled together by a second set of parallel metal lines.Type: GrantFiled: September 30, 2008Date of Patent: May 15, 2012Assignee: Infineon Technologies AGInventors: Hans-Joachim Barth, Thorsten Meyer, Markus Brunnbauer, Snezana Jenei
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Publication number: 20110201175Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.Type: ApplicationFiled: March 1, 2011Publication date: August 18, 2011Inventors: Hans-Joachim Barth, Andre Hanke, Snezana Jenei, Oliver Nagy, Jiro Morinaga, Bernd Adler, Heinrich Koerner
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Patent number: 7948064Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.Type: GrantFiled: September 30, 2008Date of Patent: May 24, 2011Assignee: Infineon Technologies AGInventors: Hans-Joachim Barth, Andre Hanke, Snezana Jenei, Oliver Nagy, Jiro Morinaga, Bernd Adler, Heinrich Koerner
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Publication number: 20110095347Abstract: Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.Type: ApplicationFiled: January 7, 2011Publication date: April 28, 2011Applicant: Infineon Technologies AGInventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Patent number: 7888775Abstract: Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.Type: GrantFiled: September 27, 2007Date of Patent: February 15, 2011Assignee: Infineon Technologies AGInventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Publication number: 20100078779Abstract: Structures of a system on a chip are disclosed. In one embodiment, the system on a chip (SoC) includes an RF component disposed on a first part of a substrate, a semiconductor component disposed on a second part of the substrate, the semiconductor component and the RF component sharing a common boundary, and a conductive cage disposed enclosing the RF component. The conductive cage shields the semiconductor component from electromagnetic radiation originating from the RF circuit.Type: ApplicationFiled: September 30, 2008Publication date: April 1, 2010Inventors: Hans-Joachim Barth, Andre Hanke, Snezana Jenei, Oliver Nagy, Jiro Morinaga, Bernd Adler, Heinrich Koerner
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Publication number: 20100078778Abstract: A system on chip comprising a RF shield is disclosed. In one embodiment, the system on chip includes a RF component disposed on a chip, first redistribution lines disposed above the system on chip, the first redistribution lines coupled to I/O connection nodes. The system on chip further includes second redistribution lines disposed above the RF component, the second redistribution lines coupled to ground potential nodes. The second redistribution lines include a first set of parallel metal lines coupled together by a second set of parallel metal lines.Type: ApplicationFiled: September 30, 2008Publication date: April 1, 2010Inventors: Hans-Joachim Barth, Thorsten Meyer, Markus Brunnbauer, Snezana Jenei
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Publication number: 20090309167Abstract: Embodiments relate to a bipolar transistor that includes a body region having a fin structure. At least one terminal region may be formed over at least a portion of the body region. The at least one terminal region may be formed as an epitaxially grown region. Embodiments also relate to a vertically integrated electronic device that includes a first terminal region, a second terminal region and a third terminal region. The second terminal region may be arranged over at least a portion of the third terminal region, and at least two of the first, second and third terminal regions may be formed as epitaxially grown regions.Type: ApplicationFiled: June 12, 2008Publication date: December 17, 2009Inventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Publication number: 20090085163Abstract: Some embodiments relate to an apparatus that exhibits vertical diode activity to occur between a semiconductive body and an epitaxial film that is disposed over a doping region of the semiconductive body. Some embodiments include an apparatus that causes both vertical and lateral diode activity. Some embodiments include a gated vertical diode for a finned semiconductor apparatus. Process embodiments include the formation of vertical-diode apparatus.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Inventors: Christian Russ, Christian Pacha, Snezana Jenei, Klaus Schruefer
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Publication number: 20080203480Abstract: In an embodiment, an apparatus includes a source region, a gate region and a drain region supported by a substrate, and a drift region including a plurality of vertically extending n-wells and p-wells to couple the gate region and the drain region of a transistor, wherein the plurality of n-wells and p-wells are formed in alternating longitudinal rows to form a superjunction drift region longitudinally extending between the gate region and the drain region of the transistor.Type: ApplicationFiled: February 23, 2007Publication date: August 28, 2008Applicant: INFINEON TECHNOLOGIES AGInventors: Martin Stiftinger, Snezana Jenei, Wolfgang Werner, Uwe Hodel