Patents by Inventor So-Eun Shin

So-Eun Shin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10223494
    Abstract: A method of manufacture comprises a mask process correction (MPC) and verifying MPC accuracy. MPC may be performed on mask tape-out (MTO) data describing a mask pattern to obtain mask process corrected data. MPC may be performed to address a deviation between the MTO data and a mask to be manufactured. Verification of the MPC may be performed by generating a two-dimensional (2D) contour of mask pattern elements based on the mask process corrected data. When MPC has been verified, the mask process corrected data may be used to manufacture a mask and a semiconductor device.
    Type: Grant
    Filed: July 25, 2016
    Date of Patent: March 5, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: So-eun Shin, Ji-soong Park, Suk-ho Lee, Jung-wook Shon
  • Patent number: 9709893
    Abstract: An exposure method includes designing a target pattern to be formed on a substrate, producing a first dose map having first dose values of beams of energy, e.g., electron beams, creating from the first dose map a second dose map having second dose values different from the first dose values, and irradiating regions of a layer of photoresist on the substrate with overlapping beams to expose the regions to doses of energy having values based on the second dose values. The photoresist layer may then be developed and used an etch mask. The etch mask may be used to etch a mask layer on a transparent substrate to form a reticle.
    Type: Grant
    Filed: January 8, 2016
    Date of Patent: July 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sook Hyun Lee, Shuichi Tamamushi, So-Eun Shin, Inkyun Shin, Jin Choi
  • Publication number: 20170024510
    Abstract: A method of manufacture comprises a mask process correction (MPC) and verifying MPC accuracy. MPC may be performed on mask tape-out (MTO) data describing a mask pattern to obtain mask process corrected data. MPC may be performed to address a deviation between the MTO data and a mask to be manufactured. Verification of the MPC may be performed by generating a two-dimensional (2D) contour of mask pattern elements based on the mask process corrected data. When MPC has been verified, the mask process corrected data may be used to manufacture a mask and a semiconductor device.
    Type: Application
    Filed: July 25, 2016
    Publication date: January 26, 2017
    Inventors: So-eun Shin, Ji-soong Park, Suk-ho Lee, Jung-wook Shon
  • Publication number: 20160260507
    Abstract: Disclosed is a containment filtered venting system (CFVS) for a nuclear power plant, which may include a filtering and venting container which is configured to store the components of the filtered venting system; an inlet pipe which is connected to the filtering and venting container and a reactor building; combined nozzles which are connected to the inlet pipe and are submerged under a filtering solution filled in part of the filtering and venting container; a cyclone separator which is configured to remove larger size substances in droplets and aerosols mixed with the filtering solution from the combined nozzles and guide to a metal filter; a metal filter which is connected to the top of the cyclone separator and is configured to filer impurities mixed in the residual droplets and aerosols; a molecular sieve which is configured to remove organic iodine from exhaust gas filtered by the metal filter; and an outlet pipe which serves to connect the filtering and venting container and a stack.
    Type: Application
    Filed: March 3, 2015
    Publication date: September 8, 2016
    Applicant: FNC Technology Co., Ltd.
    Inventors: BYUNG CHUL LEE, DOO YONG LEE, TONG KYU PARK, YOUNG SUK BANG, JUNG HEE HA, WOO WYOUNG JUNG, SO EUN SHIN
  • Publication number: 20160223903
    Abstract: An exposure method includes designing a target pattern to be formed on a substrate, producing a first dose map having first dose values of beams of energy, e.g., electron beams, creating from the first dose map a second dose map having second dose values different from the first dose values, and irradiating regions of a layer of photoresist on the substrate with overlapping beams to expose the regions to doses of energy having values based on the second dose values. The photoresist layer may then be developed and used an etch mask. The etch mask may be used to etch a mask layer on a transparent substrate to form a reticle.
    Type: Application
    Filed: January 8, 2016
    Publication date: August 4, 2016
    Inventors: SOOK HYUN LEE, SHUICHI TAMAMUSHI, SO-EUN SHIN, INKYUN SHIN, JIN CHOI
  • Publication number: 20140302428
    Abstract: A photo-mask for fabricating a semiconductor device may include a transparent substrate including a main region, a supplementary region adjacent to the main region, a main pattern for developing circuits in a semiconductor device provided on the main region of the transparent substrate, and a supplementary pattern for optical proximity correction provided on the supplementary region of the transparent substrate. The main pattern has a sidewall perpendicular to a surface of the transparent substrate, and the supplementary pattern has a sidewall inclined to the surface of the transparent substrate and an upward tapered structure.
    Type: Application
    Filed: December 3, 2013
    Publication date: October 9, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: So-Eun Shin, Byunggook Kim, Jihyeon Choi