Abstract: A thin film transistors (TFTs) substrate is structured to maintain as constant across the area of the substrate a kickback voltage due to Miller capacitance between the drain and gate of each TFT even in the presence of manufacturing induced misalignments between the drain electrodes and corresponding gate lines. Each thin film transistor includes a gate electrode, an active layer formed on the gate electrode so as to overlap the gate electrode, first and second source electrodes respectively connected to first and second data lines each of which crosses the gate line while being insulated from the gate line, and an elongated drain electrode located between the first and second source electrodes and disposed over the gate electrode so as to a crossing length of the drain electrode is larger than an underlying width of the gate electrode such that misalignment induced shifts of the position of the gate electrode relative to the drain electrode does not substantially change overlap area between the two.

Abstract: The present invention provides a liquid crystal display including a first insulation substrate, gate lines disposed on the first insulation substrate, data lines insulated from and crossing the gate lines, thin film transistors connected to the gate lines and the data lines, and pixel electrodes divided into a plurality of regions by first domain dividers and connected to the thin film transistors. The first domain dividers include a plurality of first notches and the width of each first domain dividers increases or decreases in a region between the first notches.