Abstract: A stator for an electric machine has a stator block and at least one first and one second phase winding. The first and second phase windings are supplied with current having different phases. At least one stator slot is formed in the stator block. Several layers of the first phase winding and several layers of the second phase winding are arranged in the stator slot. One layer of the first phase winding defines a layer of the second phase winding in the stator slot.

Abstract: A stator for an electric machine has a stator block and at least one first and one second phase winding. The first and second phase windings are supplied with current having different phases. At least one stator slot is formed in the stator block. Several layers of the first phase winding and several layers of the second phase winding are arranged in the stator slot. One layer of the first phase winding defines a layer of the second phase winding in the stator slot.

Abstract: An electric motor has a rotor that is rotatably arranged around a rotor shaft. The rotor is mounted by way of at least one outer bearing that is arranged at a radial distance from the rotor shaft. The rotor has an annular design and is connected to the rotor shaft by way of at least one flexible connecting element.

Abstract: An electric motor has a rotor that is rotatably arranged around a rotor shaft. The rotor is mounted by way of at least one outer bearing that is arranged at a radial distance from the rotor shaft. The rotor has an annular design and is connected to the rotor shaft by way of at least one flexible connecting element.

Abstract: A decoder has a first memory for storing a coded first image. The image is stored in the first memory until it has been decoded at least twice. The results of the decoding operations can be supplied to a playback device. The invention makes it possible to dispense with an output frame buffer for the decoded first image, and thus only little memory is required in the decoder.

Abstract: A memory management method for entering data into and reading data out of a storage device enters data into the storage device in such a way that in the process the data last read out from the storage device are in each case overwritten by the data to be entered. The method makes it possible for a converting unit for converting sequentially fed image data into a sequence suitable for carrying out an interlacing method to operate with a memory having a storage capacity that is reduced to a minimum.

Abstract: A method for synchronization of a clock signal, which can be generated in a data receiving station, with a clock signal which is used in a data transmitting station. The synchronization is in each case carried out by evaluating a value and a time of received timemark data which represents a count that is dependent on the clock signal frequency in which the timemark data are transmitted to the data receiving station from the data transmitting station. The described method is distinguished by the fact that a parameter which characterizes the frequency of the clock signal of the data transmitting station is estimated in the data receiving station, at least partially taking into account the respective current timemark data and the previously received timemark data, and by the fact that a clock signal generator, which produces the clock signal to be synchronized, is triggered on the basis of the estimated value obtained in this way.

Abstract: In a method for fast decoding of the output signals of sigma delta modulators, the decoded output signal of a modulator is acquired using a sequence of iteration steps. In each step, two operations P.sub.1 or, respectively, P.sub.2 are thereby successively implemented, whereby the signals s are presented by components s(n), s(n-1), s(n-2), . . . , s(n-k) that are temporal samples of these signals. The operation P.sub.1 is a projection in the space of all input signals of the modulator onto the set of all of those input signals that the modulator images onto the output signal to be decoded. The operation P.sub.2 is a projection onto the sub-space of all band-limited input signals of the modulator. A presentation of the signals is selected for both operations wherein the operation P.sub.1 can be implemented component-by-component. This method is substantially faster (10.sup.4 -10.sup.