Patents by Inventor Sohbe Suzuki

Sohbe Suzuki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5426314
    Abstract: A static induction thyristor has a first semiconductor area having a high impurity concentration of a first conductivity type. A second semiconductor area having low impurity concentration is formed adjacent to the first semiconductor area. A third semiconductor area having a high impurity concentration of a second conductivity type which is the conductivity type opposite to the first conductivity type is formed on a part of a surface of the second semiconductor area so located as to form a fourth semiconductor area located within the third semiconductor area. A fifth semiconductor area having a high impurity concentration of the first conductivity type is formed on the part of the surface of the second semiconductor area in spaced relation to the forth semiconductor area.
    Type: Grant
    Filed: April 21, 1994
    Date of Patent: June 20, 1995
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Sohbe Suzuki
  • Patent number: 5323028
    Abstract: In a MOS controlled power device, or MOS composite a static induction thyristor, an static induction thyristor (SI thyristor) unit, a MOS transistor connected in cascode relation to the SI thyristor unit and a voltage regulation element are merged onto the single monolithic chip. The SI thyristor unit has a cathode region of first conductivity type having high impurity concentration, an anode and a gate regions of second conductivity type having high impurity concentration, and a channel region of first conductivity type having low impurity concentration. The MOS transistor has a drain region which is the same region as the cathode region, a well or a base of second conductivity type formed adjacent to the channel region of the SI thyristor unit, and a source region of first conductivity type having high impurity concentration. The source region is formed within the well or above the base.
    Type: Grant
    Filed: September 21, 1992
    Date of Patent: June 21, 1994
    Assignee: Zaidan Hojin Handotai Kenkyu Shinkokai
    Inventors: Jun-ichi Nishizawa, Sohbe Suzuki
  • Patent number: 5115287
    Abstract: A step-cut insulated gate static induction transistor can accurately make a channel length and a gate length and is excellent as a high speed transistor but is greatly affected by a deviation in mask alignment in the manufacturing process. This invention utilizes the fact that a gate portion formed in a previous processes is used as a mask in a post portion to thereby self-adjustably form the post portion, thus eliminating the influence of the deviation in mask alignment. In addition, a construction has been invented in which a current flowing through a portion apart from a gate between a drain and a source can be restricted. The aforesaid manufacturing method is also used for this improved construction.
    Type: Grant
    Filed: August 30, 1991
    Date of Patent: May 19, 1992
    Assignee: Research Development Corporation of Japan
    Inventors: Junichi Nishizawa, Nobuo Takeda, Sohbe Suzuki
  • Patent number: 4686555
    Abstract: A solid state image sensor comprising static induction transistors each forming a picture element.Each static induction transistor in the solid state image sensor has a lateral structure in which the source and drain regions are formed by surface regions provided on the same side in an epitaxial layer forming the channel region and a signal charge storage gate region are formed by a buried gate region provided under the channel region and a surface gate region provided on the channel region, so that the source-drain current flows in parallel to the surface of epitaxial layer and is effectively controlled between the buried and surface gate regions.
    Type: Grant
    Filed: November 30, 1983
    Date of Patent: August 11, 1987
    Assignee: Olympus Optical Co., Ltd.
    Inventors: Atsushi Yusa, Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi
  • Patent number: 4626916
    Abstract: A solid state image pickup device having a shutter function is disclosed. The device comprises a plurality of picture cells each having a static induction transistor arranged in a matrix. The device further comprises a plurality of gate signal lines for simultaneously supplying gate signals to the picture cells placed on respective rows of the matrix, a vertical scanning register for generating and scanning the gate signals, a plurality of signal readout lines for reading out light signals stored in the picture cells placed on respective columns of the matrix, a shift register for simultaneously and temporarily storing read out signals and converting them into time series signals, a device connected between the signal readout means and the temporary storage means for controlling the connection therebetween.
    Type: Grant
    Filed: November 29, 1983
    Date of Patent: December 2, 1986
    Assignees: Olympus Optical Co., Ltd., Jun-ichi Nishizawa
    Inventors: Toyokazu Mizoguchi, Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi
  • Patent number: 4596605
    Abstract: In a process for fabricating a static induction transistor having a gate region which is formed in a semiconductor layer including a channel region, ions of an impurity element are implanted into the semiconductor layer from the surface thereof to form the gate region. Ions of an element lighter than the impurity element are implanted into the gate region from the surface of the semiconductor layer in such a way that the concentration of the light element exhibits a plurality of profiles in the depth direction of the semiconductor layer. The semiconductor layer is annealed at a relatively low temperature after the two implanting steps to form the gate region in the semiconductor layer. A solid-state image sensor device is fabricated by using the static induction transistor as a picture cell.
    Type: Grant
    Filed: December 14, 1983
    Date of Patent: June 24, 1986
    Inventors: Junichi Nishizawa, Sohbe Suzuki, Mitsuru Ikeda, Hideki Mutoh
  • Patent number: 4587562
    Abstract: A solid state image pick-up device comprising a large number of picture cells arranged in a matrix. The picture cell comprises a first photoelectric conversion and readout SIT which comprises a gate region operating as a photoelectric conversion area and a second reset SIT which comprises a region (drain or source) electrically connected to the gate region of the first SIT, whereby the photoelectric charges stored in the gate regions of the first SITs of the picture cells in a matrix can be individually reset by means of the related second SITs.
    Type: Grant
    Filed: November 29, 1983
    Date of Patent: May 6, 1986
    Assignees: Olympus Optical Co., Ltd., Jun-Ichi Nishizawa
    Inventors: Masaharu Imai, Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi
  • Patent number: 4531156
    Abstract: A solid state image pickup device having an electronic shutter function is disclosed. The device comprises a plurality of picture cells each having a static induction transistor and arranged in a matrix, a plurality of vertical and horizontal scanning lines for scanning the cells, vertical and horizontal registers for generating scanning pulses which drive the vertical and horizontal scanning lines, a readout signal line for reading out light information stored in the cells, a reset signal line for resetting the cells, and a shutter speed control circuit for optionally setting in one frame period the timing of reset scanning pulses generated from a vertical register.
    Type: Grant
    Filed: December 1, 1983
    Date of Patent: July 23, 1985
    Assignees: Olympus Optical Company Limited, Jun-ichi Nishizawa
    Inventors: Jun-ichi Nishizawa, Sohbe Suzuki, Takashige Tamamushi, Yasuo Arisawa