Abstract: A sensor circuit included in a computer system may include multiple antennae and transceiver circuits that include transmitter and receiver circuits. A particular transceiver circuit may transmit, via a particular antenna, a transmit signal that is a modulated version of a baseband signal, and generate a leakage signal based on leakage between transmitter and receiver circuits included in the particular transceiver circuit. A different transceiver circuit may generate a received signal using a reflected version of the transmitted signal that is received via a different antenna. An output signal may be generated using the received and leakage signals.

Abstract: A transceiver circuit that includes a receiver and transmitter circuits may send and receive data signals using an antenna. The transceiver circuit may be coupled to the antenna and other circuits using multiple impedance matching networks configured to match input and output impedance values of the receiver and transmitter circuits to the antenna and other circuits. The impedance matching networks may selectively couple and decouple different ports of the receiver and transmitter circuits to other circuit nodes based on whether the transceiver is operating in transmit or receive mode.

Abstract: A voltage controlled oscillator (VCO) having a harmonic trap is disclosed. A VCO includes first and second transistors cross-coupled with one another. The VCO further includes a first inductor having first and second loops coupled to one another, wherein the first inductor is arranged such that current flow through first loop is in the opposite direction of current flow in the second loop. The VCO further includes a second inductor that implements a third loop surrounding the first inductor.

Abstract: A voltage controlled oscillator (VCO) having a harmonic trap is disclosed. A VCO includes first and second transistors cross-coupled with one another. The VCO further includes a first inductor having first and second loops coupled to one another, wherein the first inductor is arranged such that current flow through first loop is in the opposite direction of current flow in the second loop. The VCO further includes a second inductor that implements a third loop surrounding the first inductor.

Abstract: A Wilkinson Combiner circuit is disclosed. The circuit includes first and second input ports, and a resistive-capacitive (RC) network coupled there between. The circuit further includes an amplifier having an amplifier input node, and a coupled inductor. The coupled inductor includes first, second, and third terminals, coupled to the first input port, the second input port, and the amplifier input node, respectively. Signals conveyed from the first and second input ports are passed through the corresponding portions of the coupled inductor, are combined into a composite signal and amplified by the amplifier.

Abstract: A Wilkinson Combiner circuit is disclosed. The circuit includes first and second input ports, and a resistive-capacitive (RC) network coupled there between. The circuit further includes an amplifier having an amplifier input node, and a coupled inductor. The coupled inductor includes first, second, and third terminals, coupled to the first input port, the second input port, and the amplifier input node, respectively. Signals conveyed from the first and second input ports are passed through the corresponding portions of the coupled inductor, are combined into a composite signal and amplified by the amplifier.

Abstract: A transceiver circuit that includes a receiver and transmitter circuits may send and receive data signals using an antenna. The transceiver circuit may be coupled to the antenna and other circuits using multiple impedance matching networks configured to match input and output impedance values of the receiver and transmitter circuits to the antenna and other circuits. The impedance matching networks may selectively couple and decouple different ports of the receiver and transmitter circuits to other circuit nodes based on whether the transceiver is operating in transmit or receive mode.

Abstract: A triplexer having integrated switching circuitry is disclosed. In one embodiment, a triplexer is used, in a transmit mode, to combine a clock signal, a control signal, and a modulated (e.g., a radio frequency, or RF) signal into a composite signal for transmission over a transmission line. In a receive mode, the triplexer receives and separates the composite signal into the clock signal, the control signal, and the modulated signal. The triplexer further includes switching circuitry integrated therein. The switching circuitry is operable to switch the triplexer between the transmit and receive modes.

Abstract: A triplexer having integrated switching circuitry is disclosed. In one embodiment, a triplexer is used, in a transmit mode, to combine a clock signal, a control signal, and a modulated (e.g., a radio frequency, or RF) signal into a composite signal for transmission over a transmission line. In a receive mode, the triplexer receives and separates the composite signal into the clock signal, the control signal, and the modulated signal. The triplexer further includes switching circuitry integrated therein. The switching circuitry is operable to switch the triplexer between the transmit and receive modes.

Abstract: A transmit-receive (T/R) switch is disclosed. An apparatus including a T/R switch includes a transceiver to transmit signals to an antenna and to receive signals from the antenna. The signals are conveyed to and from the transceiver by a T/R switch. The T/R switch includes a transmit path and a receive path. The receive path includes a three-port inductor having a first terminal coupled to an input/output (I/O) terminal of the T/R switch and a second terminal coupled to a first pass transistor, and a third terminal. A pull-down transistor is coupled between the third terminal and a ground node. When active, the pull-down transistor pulls the receive path down toward ground.

Abstract: A circuit features a balun having an unbalanced input and a balanced output, and a differential coupler having a symmetrical structure about a center axis. The differential coupler has a differential input and a differential output, the differential input being coupled to the balanced output of the balun. An impedance element is coupled to a circuit node of the differential coupler at a point along the center axis. Other embodiments are also described and claimed.

Abstract: A method and apparatus is disclosed herein for wireless communication with adaptive beamforming. In one embodiment, the apparatus comprises a processor, a radio frequency (RF) transmitter having a digitally controlled phased array antenna coupled to and controlled by the processor to transmit content using adaptive beamforming, and an interface to a wireless communication channel coupled to the processor to communicate antenna information relating to the use of the phased array antenna and to communicate information to facilitate playing the content at another location.

Abstract: A circuit features a balun having an unbalanced input and a balanced output, and a differential coupler having a symmetrical structure about a center axis. The differential coupler has a differential input and a differential output, the differential input being coupled to the balanced output of the balun. An impedance element is coupled to a circuit node of the differential coupler at a point along the center axis. Other embodiments are also described and claimed.