Patents by Inventor Soichi Moriya

Soichi Moriya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090096773
    Abstract: An electrophoretic display device includes a common electrode and a plurality of pixel electrodes, a disperse system containing electrophoretic particles, the disperse system being held between the common electrode and the plurality of pixel electrodes. The electrophoretic display device includes a switching transistor and a control portion. the switching transistor supplies a corresponding one of the pixel electrodes with a low electric potential signal or a high electric potential signal supplied from a signal line. The control portion controls an electric potential applied between each of the pixel electrodes and the common electrode to cause the electrophoretic particles to move. The control portion provides, in a period during which control for causing the electrophoretic particles to move is performed, a first period during which the switching transistor is held in an on state and a second period during which the switching transistor is held in an off state.
    Type: Application
    Filed: October 8, 2008
    Publication date: April 16, 2009
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Soichi MORIYA, Tsutomu MIYAMOTO
  • Publication number: 20080316581
    Abstract: An electrophoretic display device includes a transparent element substrate, a transparent opposite substrate, an electrophoretic display layer, and a selector. The element substrate has at least one transparent pixel electrode. The opposite substrate has a common electrode that is in correspondence with the at least one pixel electrode. The electrophoretic display layer is held between the element substrate and the opposite substrate. The selector selects any one of the element substrate and the opposite substrate as a display side of the electrophoretic display layer.
    Type: Application
    Filed: June 17, 2008
    Publication date: December 25, 2008
    Applicant: Seiko Epson Corporation
    Inventors: Soichi Moriya, Tsutomu Miyamoto
  • Patent number: 7459793
    Abstract: A method for forming a contact hole, a method for manufacturing a circuit board and a method for manufacturing an electro-optical device that increase the reliability of electrical coupling via a conductive part and prevent wire-breaking due to projections when forming a contact hole in an interlayer film by using a needle, and burying a conductive material in the contact hole is provided.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: December 2, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Mitsuaki Harada, Soichi Moriya
  • Publication number: 20080266514
    Abstract: A method for producing an active-matrix substrate including a board, pixels, thin-film transistors that switch the pixels, and source lines and gate lines electrically connected to the thin-film transistors includes forming a conduction portion that provides electrical connection between the source lines and the gate lines using an organic conductive material at the same time as forming either the source lines or the gate lines; and breaking the electrical connection provided by the conduction portion.
    Type: Application
    Filed: April 24, 2008
    Publication date: October 30, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Soichi Moriya, Takeo Kawase, Tsutomu Miyamoto, Kiyoshi Nakamura
  • Patent number: 7436465
    Abstract: A region of an electrooptical device includes a substrate, an active matrix switching element formed on the substrate and a pixel electrode formed on the substrate and having a first pixel electrode coupled to the switching element AM and a second pixel electrode covering a second switching element coupled to a third electrode.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: October 14, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Moriya, Takeo Kawase
  • Publication number: 20080239460
    Abstract: Provided is a method of driving an organic transistor formed on a substrate, wherein the substrate is sealed by a sealing material, and a bias voltage for compensating for threshold voltage of the organic transistor is supplied to the organic transistor at least at the time of an operation of the organic transistor.
    Type: Application
    Filed: March 25, 2008
    Publication date: October 2, 2008
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Hikari SHIMIZU, Tsutomu MIYAMOTO, Soichi MORIYA
  • Patent number: 7399989
    Abstract: An electrode is provided that is economically produced and capable of efficiently injecting holes. Also provided are a method to form an electrode that is capable of easily manufacturing such an electrode, a highly reliable thin-film transistor, an electronic circuit using this thin-film transistor, an organic electroluminescent element, a display, and electronic equipment. A thin-film transistor is a top-gate thin-film transistor. The thin-film transistor includes a source electrode and a drain electrode that are placed separately from each other. The thin-film transistor also includes an organic semiconductor layer that is laid out between the source electrode and the drain electrode, and a gate insulating layer that is provided between the organic semiconductor layer and a gate electrode. This structure is mounted on a substrate. Each of the source electrode and the drain electrode is composed of two layers, that is, an underlying electrode layer and a surface electrode layer.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: July 15, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Soichi Moriya, Takeo Kawase, Mitsuaki Harada
  • Publication number: 20080113466
    Abstract: A method of forming a contact hole includes forming a first conductive layer patterned so as to serve as an electrode or a wiring on a substrate, forming an insulation layer on the substrate and the first conductive layer, inserting a cutting instrument into the insulation layer at an angle to a surface of the insulation layer, the angle being in the range from #5#° to~ 80#°, and forming a tapered opening extending to the electrode or the wiring in the insulation layer by drawing out the cutting instrument.
    Type: Application
    Filed: October 5, 2007
    Publication date: May 15, 2008
    Applicant: Seiko Epson Corporation
    Inventors: Soichi Moriya, Takeo Kawase, Mitsuaki Harada, Takehisa Saeki, Tomoyuki Okuyama, Hirofumi Hokari, Takashi Aoki
  • Patent number: 7361927
    Abstract: A transistor having at least one of a source electrode and a drain electrode being formed of a porous film is described. The transistor maintains its characteristics even after being subjected to a high temperature and high humidity environment. The transistor may be used in a circuit board, a display and electronic equipment.
    Type: Grant
    Filed: August 7, 2006
    Date of Patent: April 22, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Takeo Kawase, Soichi Moriya, Mitsuaki Harada
  • Patent number: 7358118
    Abstract: Aspects of the current invention are directed to a method of mounting a flexible printed circuit and a manufacturing method of an electric optical device. Each of the methods form semiconductor elements and first terminal portions for electrically connecting the semiconductor elements and the outside of the board. These terminal portions have are completely or partially covered with an organic film 37 and are pressed into second terminal portion on the flexible printed circuit from the direction above the organic film thereby creating an electrical connection. Optionally, an anisotropic conductive paste or anisotropic conductive film may be provided between the second terminal portion and the organic film.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: April 15, 2008
    Assignee: Seiko Epson Corporation
    Inventors: Mitsuaki Harada, Soichi Moriya, Takeo Kawase, Atsushi Miyazaki
  • Publication number: 20070295960
    Abstract: A semiconductor device includes an organic semiconductor transistor provided on a substrate; a data line connected to a source electrode or a drain electrode of the organic semiconductor transistor; and a gate line that is disposed so as to intersect the data line and that is connected to a gate electrode of the organic semiconductor transistor. In the semiconductor device, the gate line includes the gate electrode, a first gate line that transmits signals to the gate electrode, and a second gate line intersecting the data line, with an interlayer insulation layer therebetween; the gate electrode, the first gate line, and the second gate line are connected in series; and the electric conductivity of the first gate line is higher than the electric conductivity of the gate electrode and the electric conductivity of the second gate line.
    Type: Application
    Filed: June 6, 2007
    Publication date: December 27, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Soichi MORIYA, Takeo KAWASE
  • Publication number: 20070235733
    Abstract: A transistor includes a first gate electrode, a second gate electrode formed over the first gate electrode, a source electrode formed above the first gate electrode, a drain electrode formed above the first gate electrode, and a semiconductor layer covering at least part of the source electrode and at least part of the drain electrode and disposed between the first gate electrode and the second gate electrode. The source electrode includes a first main portion extending in a direction and at least one first protrusion protruding in a direction intersecting the direction in which the first main portion extends. The drain electrode includes at least one second protrusion protruding toward the first main portion.
    Type: Application
    Filed: March 29, 2007
    Publication date: October 11, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventor: Soichi MORIYA
  • Publication number: 20070194349
    Abstract: An active matrix substrate comprises a substrate, a first electrode disposed on one surface side of the substrate, an insulating film, a plurality of second electrodes, and a plurality of switching elements. The insulating film is disposed between the first electrode and the plurality of second electrodes, and each of the plurality of second electrodes is electrically connected to one of the plurality of switching elements.
    Type: Application
    Filed: February 21, 2007
    Publication date: August 23, 2007
    Applicant: Seiko Epson Corporation
    Inventors: Takeo Kawase, Tsutomu Miyamoto, Soichi Moriya
  • Publication number: 20070126002
    Abstract: A thin-film transistor includes a gate electrode, a source electrode, a drain electrode, a semiconductor layer, and a gate insulating layer for insulating the source electrode and the drain electrode from the gate electrode, wherein the gate insulating layer includes composite particles in which a hydrophobic compound is provided on the surfaces of insulating inorganic particles.
    Type: Application
    Filed: December 1, 2006
    Publication date: June 7, 2007
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Soichi MORIYA, Takeo KAWASE
  • Publication number: 20070099333
    Abstract: Aspects of the invention can provide a thin-film transistor having good transistor characteristics and operable with a low driving voltage, a method of producing such a thin-film transistor, a high-reliability electronic circuit, a display, and an electronic device. In an exemplary thin-film transistor according to the invention, a gate electrode can be formed on a substrate via an underlying layer, and a gate insulating layer can be formed on the substrate such that the gate electrode is covered with the gate insulating layer. A source electrode and a drain electrode are formed on the gate insulating layer such that they are separated from each other by a gap formed just above the gate electrode. An organic semiconductor layer can be formed thereon such that the electrodes are covered with the organic semiconductor layer. A region between the electrodes of the organic semiconductor layer functions as a channel region. A protective layer can be arranged on the organic semiconductor layer.
    Type: Application
    Filed: October 30, 2006
    Publication date: May 3, 2007
    Applicant: Seiko Epson Corporation
    Inventor: Soichi Moriya
  • Patent number: 7199049
    Abstract: A method for forming a contact hole, a method for manufacturing a circuit board and a method for manufacturing an electro-optical device that increase the reliability of electrical coupling via a conductive part and prevent wire-breaking due to projections when forming a contact hole in an interlayer film by using a needle, and burying a conductive material in the contact hole is provided.
    Type: Grant
    Filed: June 13, 2005
    Date of Patent: April 3, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Mitsuaki Harada, Soichi Moriya
  • Patent number: 7180108
    Abstract: A transistor having at least one of a source electrode and a drain electrode being formed of a porous film is described. The transistor maintains its characteristics even after being subjected to a high temperature and high humidity environment. The transistor may be used in a circuit board, a display and electronic equipment.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: February 20, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Takeo Kawase, Soichi Moriya, Mitsuaki Harada
  • Publication number: 20060267005
    Abstract: A transistor having at least one of a source electrode and a drain electrode being formed of a porous film is described. The transistor maintains its characteristics even after being subjected to a high temperature and high humidity environment. The transistor may be used in a circuit board, a display and electronic equipment.
    Type: Application
    Filed: August 7, 2006
    Publication date: November 30, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Takeo Kawase, Soichi Moriya, Mitsuaki Harada
  • Publication number: 20060263945
    Abstract: A method for forming a contact hole, a method for manufacturing a circuit board and a method for manufacturing an electro-optical device that increase the reliability of electrical coupling via a conductive part and prevent wire-breaking due to projections when forming a contact hole in an interlayer film by using a needle, and burying a conductive material in the contact hole is provided.
    Type: Application
    Filed: July 31, 2006
    Publication date: November 23, 2006
    Applicant: SEIKO EPSON CORPORATION
    Inventors: Mitsuaki HARADA, Soichi MORIYA
  • Publication number: 20060220022
    Abstract: A semiconductor device includes first and second electrodes disposed apart from each other on a substrate, a gate electrode disposed so as to face the first and second electrodes and to cover at least part of each of the first and second electrodes, a semiconductor layer disposed between the first and second electrodes and the gate electrode, and a gate insulating layer disposed between the gate electrode and the semiconductor layer, the gate insulating layer having a film thickness that is greater in portions located directly above areas where the first and second electrodes are under the gate electrode than in a portion located directly above an area between the first and second electrodes.
    Type: Application
    Filed: March 27, 2006
    Publication date: October 5, 2006
    Applicant: Seiko Epson Corporation
    Inventor: Soichi Moriya