Abstract: A method of forming a recessed access device comprises forming a trench in semiconductor material. Sidewalls and a bottom of the trench are lined with low-k gate-insulator material. The low-k gate-insulator material is characterized by its dielectric constant k being no greater than 4.0. Sacrificial material is formed in a bottom portion of the trench over the low-k gate-insulator material and over the trench bottom. A high-k gate-insulator material is formed in an upper portion of the trench above the sacrificial material and laterally-inward of the low-k gate-insulator material that is in the upper portion of the trench. The high-k gate-insulator material is characterized by its dielectric constant k being greater than 4.0. The sacrificial material is replaced with a conductive gate that has its top above a bottom of the high-k gate-insulator material. A pair of source/drain regions is formed in upper portions of the semiconductor material on opposing lateral sides of the trench.

Abstract: A variety of applications can include an apparatus having an electronic device including a number of transistors in a pair-wise arrangement that can address a floating body effect associated with the type of transistor implemented in the pair-wise arrangement. The transistors can be structured as thin film transistors having one-gate separated by a gate dielectric from a vertical channel structure. The pair-wise arrangement can include a conductive shield between a channel structure of a transistor of the pair and a channel structure of the other transistor of the other pair. A conductive body can be located below the conductive shield and shorted to the conductive shield, where the conductive body contacts the channel structures of the transistors of the pair-wise arrangement. The conductive shield can be coupled to node to be set at a constant voltage in operation.

Abstract: An apparatus may include a first matrix comprising a first plurality of digit lines, a second matrix comprising a second plurality of digit lines, a plurality of sense amplifiers, and a plurality of selector circuits. Each selector circuit of the plurality of selector circuits may be configured to selectively couple a respective sense amplifier to either a first digit line of the first plurality of digit lines or a second digit line of the second plurality of digit lines.

Abstract: Some embodiments include apparatuses and methods of forming the apparatuses. One of the apparatuses includes a recess formed in a semiconductor material; a dielectric structure formed in the recess; and a control gate for a transistor of a memory cell, the control gate including a first conductive portion formed in the recess and separated from the semiconductor material by a first portion of the dielectric structure, the first dielectric portion including a first dielectric material between the semiconductor material and the second dielectric material, and a second dielectric material between the first dielectric material and the first conductive portion; and the control gate including the second conductive portion formed over the first conductive portion and separated from the semiconductor material by a second portion of the dielectric structure between the semiconductor material and second conductive portion.

Abstract: A method of forming a recessed access device comprises forming a trench in semiconductor material. Sidewalls and a bottom of the trench are lined with low-k gate-insulator material. The low-k gate-insulator material is characterized by its dielectric constant k being no greater than 4.0. Sacrificial material is formed in a bottom portion of the trench over the low-k gate-insulator material and over the trench bottom. A high-k gate-insulator material is formed in an upper portion of the trench above the sacrificial material and laterally-inward of the low-k gate-insulator material that is in the upper portion of the trench. The high-k gate-insulator material is characterized by its dielectric constant k being greater than 4.0. The sacrificial material is replaced with a conductive gate that has its top above a bottom of the high-k gate-insulator material. A pair of source/drain regions is formed in upper portions of the semiconductor material on opposing lateral sides of the trench.

Abstract: A recessed access device comprises a conductive gate in a trench in semiconductor material. A gate insulator extends along sidewalls and around a bottom of the conductive gate between the conductive gate and the semiconductor material. A pair of source/drain regions are in upper portions of the semiconductor material on opposing lateral sides of the trench. A channel region in the semiconductor material below the pair of source/drain regions extends along sidewalls and around a bottom of the trench. The gate insulator comprises a low-k material and a high-k material. The low-k material is characterized by its dielectric constant k being no greater than 4.0. The high-k material is both (a) and (b), where: (a): characterized by its dielectric constant k being greater than 4.0; and (b): comprising SixMyO, where “M” is one or more of Al, metal(s) from Group 2, Group 3, Group 4, Group 5, and the lanthanide series of the periodic table; “x” is 0.999 to 0.6; and “y” is 0.001 to 0.

Abstract: Some embodiments include apparatuses and methods using the apparatuses. One of the embodiments includes a capacitor, a transistor coupled to the capacitor, the transistor and the capacitor included in a memory cell; the transistor including a channel structure, a gate including a portion located on a side of the channel structure, and a dielectric structure between the channel structure and the gate; and on-die circuitry configured to selectively apply a stress condition to the transistor to tune a threshold voltage of the transistor.

Abstract: Methods for forming microelectronic devices include forming a titanium nitride (TiN) material over a precursor structure. Forming the TiN material comprises repeating cycles of flowing a titanium-including gas adjacent the precursor structure; flowing a reducing gas over the precursor structure; flowing a nitrogen-including gas over the precursor structure; and, before and after flowing the nitrogen-including gas, purging gas. Related microelectronic device and related electronic systems are also described.

Abstract: A semiconductor device comprises a memory storage component and a transistor in operable communication with the memory storage element. The transistor comprises a source region, a drain region, a gate electrode between the source region and the drain region, a charge trapping material surrounding at least an upper portion of the gate electrode, and an oxide material on sides of the charge trapping material. Related systems and methods are also disclosed.

Abstract: A semiconductor device comprises a memory storage component and a transistor in operable communication with the memory storage element. The transistor comprises a source region, a drain region, a gate electrode between the source region and the drain region, a charge trapping material surrounding at least an upper portion of the gate electrode, and an oxide material on sides of the charge trapping material. Related systems and methods are also disclosed.

Abstract: A method of forming a semiconductor device structure comprises forming at least one reflective structure comprising at least two dielectric materials having different refractive indices over at least one radiation-sensitive structure, the at least one reflective structure configured to substantially reflect therefrom radiation within a predetermined wavelength range and to substantially transmit therethrough radiation within a different predetermined wavelength range. Additional methods of forming a semiconductor device structure are described. Semiconductor device structures are also described.

Abstract: A method of forming a semiconductor device structure comprises forming at least one reflective structure comprising at least two dielectric materials having different refractive indices over at least one radiation-sensitive structure, the at least one reflective structure configured to substantially reflect therefrom radiation within a predetermined wavelength range and to substantially transmit therethrough radiation within a different predetermined wavelength range. Additional methods of forming a semiconductor device structure are described. Semiconductor device structures are also described.

Abstract: A method of forming a semiconductor device structure comprises forming at least one reflective structure comprising at least two dielectric materials having different refractive indices over at least one radiation-sensitive structure, the at least one reflective structure configured to substantially reflect therefrom radiation within a predetermined wavelength range and to substantially transmit therethrough radiation within a different predetermined wavelength range. Additional methods of forming a semiconductor device structure are described. Semiconductor device structures are also described.

Abstract: A method of forming a semiconductor device structure comprises forming at least one reflective structure comprising at least two dielectric materials having different refractive indices over at least one radiation-sensitive structure, the at least one reflective structure configured to substantially reflect therefrom radiation within a predetermined wavelength range and to substantially transmit therethrough radiation within a different predetermined wavelength range. Additional methods of forming a semiconductor device structure are described. Semiconductor device structures are also described.

Abstract: A semiconductor integrated circuit device includes a p-silicon substrate, an n-buried layer formed in the substrate to divide the substrate into an upper region and a lower region, a trench formed from the surface of the substrate to the lower region of the substrate through the buried layer, and an electrode formed in the trench. The electrode forms an n-inversion layer using the buried layer as a carrier source, in the lower region of the semiconductor substrate by a field effect. The n-inversion layer constitutes a capacitor together with the electrode.

Abstract: A semiconductor device provided with a thin film of 0.1 nm to 2 nm in thickness, having a crystal structure different from that of a conductor and a semiconductor region, between the conductor and the semiconductor region. When the semiconductor region is made of single crystal silicon and the conductor region is made of amorphous silicon or poly silicon, the oxygen surface concentration of the thin film is equal to or higher than 1.times.10.sup.15 cm.sup.-2 and equal to or lower than 4.times.10.sup.15 cm.sup.-2 in one case, that of oxygen is equal to or higher than 1.times.10.sup.15 cm.sup.-2 and equal to or lower than 2.times.10.sup.15 cm.sup.-2 and that of nitrogen is equal to or higher than 1.times.10.sup.15 cm.sup.-2 and equal to or lower than 4.times.10.sup.15 cm.sup.-2 in the other case. The presence of the thin film prevents the epitaxial growth from starting from the interface between the conductor and the semiconductor region and reduces the crystal defect formation and growth near the interface.

Abstract: According to this present invention, a semiconductor device includes source and drain diffusion layers, and a gate electrode formed on a substrate between the source diffusion layer and the drain diffusion layer. In addition, antioxidant films are respectively formed on the source diffusion layer and the drain diffusion layer. These antioxidant films are used for controlling a diffusion rate of an impurity contained in the source diffusion layer and the drain diffusion layer.

Abstract: A p-type impurity diffusion layer is formed in a major surface region of an n-type silicon substrate. An insulating film is formed on the substrate, and a contact hole is formed in the insulating film at a position corresponding to the impurity diffusion layer. An n-type polysilicon layer is formed inside the contact hole. The p-type impurity diffusion layer and the n-type polysilicon layer constitute a diode. A p-n junction of the diode is formed on the major surface of the substrate or in the polysilicon layer above the major surface.