Patents by Inventor Soichiro Yoshida

Soichiro Yoshida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220299464
    Abstract: A gas sensor includes a sensor element and a pump cell controller. During a normal operation time of the sensor element, the pump cell controller executes a normal time measurement pump control process of pumping out the oxygen in a measurement chamber by controlling a measurement pump cell so that voltage for measurement reaches a normal time target value. At the start-up time of the sensor element, the pump cell controller executes a start-up time measurement pump control process of pumping out the oxygen in the measurement chamber by controlling the measurement pump cell so that the voltage for measurement reaches a start-up time target value higher than the normal time target value. When determining that the oxygen concentration in the measurement chamber is stabilized, the pump cell controller makes switching from the start-up time measurement pump control process to the normal time measurement pump control process.
    Type: Application
    Filed: May 26, 2022
    Publication date: September 22, 2022
    Inventors: Taku OKAMOTO, Soichiro YOSHIDA, Ryo HASHIKAWA
  • Publication number: 20220283114
    Abstract: A gas sensor includes a sensor element and a pump cell controller. The pump cell controller performs a normal time control process after a heater control process is started, the normal time control process including a main pump control process, an auxiliary pump control process of controlling an auxiliary pump cell so that a voltage for auxiliary pump reaches a target value, and a normal time measurement pump control process of pumping out oxygen in a measurement chamber by controlling the measurement pump cell so that a measurement voltage reaches a normal time target value. In an early stage of the normal time control process, the pump cell controller performs a correction process of correcting the target value of the voltage for auxiliary pump to a value higher than a target value in a period after the early stage.
    Type: Application
    Filed: May 26, 2022
    Publication date: September 8, 2022
    Inventors: Taku OKAMOTO, Soichiro YOSHIDA, Ryo HASHIKAWA
  • Publication number: 20220178869
    Abstract: A gas sensor includes a sensor element including an element body, a measurement pump cell being configured to pump out oxygen from surroundings of an inner measurement electrode to surroundings of an outer measurement electrode, and a measurement voltage detection sensor cell that detects a measurement voltage between a reference electrode and the inner measurement electrode, and a pump cell controller that executes a normal time measurement pump control process of pumping out oxygen in the measurement chamber during a normal operation time of the sensor element so that the measurement voltage reaches a normal time target value, and executes a start-up time measurement pump control process of pumping out oxygen in the measurement chamber at a start-up time of the sensor element earlier than the normal operation time so that the measurement voltage reaches a start-up time target value higher than the normal time target value.
    Type: Application
    Filed: November 22, 2021
    Publication date: June 9, 2022
    Inventors: Taku OKAMOTO, Soichiro YOSHIDA, Ryo HASHIKAWA
  • Publication number: 20220107288
    Abstract: The gas sensor is configured to measure a concentration of a predetermined gas component. The gas sensor includes a sensor element. An internal cavity configured to introduce the measurement target gas from an external space is formed inside the sensor element. The sensor element has a long side and a short side in a plan view. In the sensor element, a proportion of a length in the short side direction of a portion that is shortest in the short side direction, out of portions in which the internal cavity is not formed, to the length of the short side is 0.22 or more. The sensor element has an upper face and a lower face. A proportion of a length from the end portion of the internal cavity near the lower face to the lower face, to a thickness of the sensor element, is 0.50 or more and 0.65 or less.
    Type: Application
    Filed: September 28, 2021
    Publication date: April 7, 2022
    Inventors: Soichiro YOSHIDA, Kosuke UJIHARA
  • Publication number: 20210302356
    Abstract: A gas sensor includes a laminated body constituted by at least two ceramic layers laminated thereon, and having at least one gas introduction port, and at least one internal vacancy, and an outer side electrode formed on the laminated body, and provided in order to discharge oxygen from the internal vacancy, wherein a slit portion connected to an external space, and which is formed in the laminated body in covering relation to the outer side electrode, is interposed between the ceramic layers and the outer side electrode.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 30, 2021
    Inventors: Soichiro YOSHIDA, Kunihiko NAKAGAKI
  • Patent number: 10809224
    Abstract: A gas sensor includes a sensor element made of an oxygen-ion conductive solid electrolyte and is configured to determine a concentration of a measurement target gas component based on a sensitivity characteristic as a predetermined functional relation held between a sensor output and the concentration of the gas component. The sensor output is a potential difference generated between a sensing electrode of the sensor element heated to a predetermined sensor drive temperature and a reference electrode. At the reference electrode, Au is concentrated at a predetermined maldistribution degree on the surface of a noble metal particle. In the present invention, the sensitivity characteristic is calibrated so as to suit the maldistribution degree at the reference electrode, based on the value of a predetermined alternative maldistribution degree index acquired in a non-destructive manner by performing predetermined measurement while the sensor element is heated to the predetermined temperature.
    Type: Grant
    Filed: July 16, 2018
    Date of Patent: October 20, 2020
    Assignee: NGK INSULATORS, LTD.
    Inventors: Taku Okamoto, Yuki Nakayama, Soichiro Yoshida
  • Patent number: 10557817
    Abstract: A method of inspecting an electrode provided in a gas sensor element includes the steps of: producing, in advance, a calibration curve representing a relation between an Au maldistribution degree defined based on a ratio of an area of a portion at which Au is exposed on a noble metal particle surface and calculated from a result of XPS or AES analysis on an inspection target electrode, and a predetermined alternative maldistribution degree index correlated with the Au maldistribution degree and acquired in a non-destructive manner from the gas sensor element heated to a predetermined temperature; acquiring a value of the alternative maldistribution degree index for the inspection target electrode of the gas sensor element while the gas sensor element is heated to the predetermined temperature; and determining whether the Au maldistribution degree satisfies a predetermined standard based on the calibration curve and the acquired inspection value.
    Type: Grant
    Filed: June 4, 2018
    Date of Patent: February 11, 2020
    Assignee: NGK Insulators, Ltd.
    Inventors: Taku Okamoto, Yuki Nakayama, Soichiro Yoshida
  • Publication number: 20190025244
    Abstract: A gas sensor includes a sensor element made of an oxygen-ion conductive solid electrolyte and is configured to determine a concentration of a measurement target gas component based on a sensitivity characteristic as a predetermined functional relation held between a sensor output and the concentration of the gas component. The sensor output is a potential difference generated between a sensing electrode of the sensor element heated to a predetermined sensor drive temperature and a reference electrode. At the reference electrode, Au is concentrated at a predetermined maldistribution degree on the surface of a noble metal particle. In the present invention, the sensitivity characteristic is calibrated so as to suit the maldistribution degree at the reference electrode, based on the value of a predetermined alternative maldistribution degree index acquired in a non-destructive manner by performing predetermined measurement while the sensor element is heated to the predetermined temperature.
    Type: Application
    Filed: July 16, 2018
    Publication date: January 24, 2019
    Inventors: Taku OKAMOTO, Yuki NAKAYAMA, Soichiro YOSHIDA
  • Publication number: 20180356364
    Abstract: A method of inspecting an electrode provided in a gas sensor element includes the steps of: producing, in advance, a calibration curve representing a relation between an Au maldistribution degree defined based on a ratio of an area of a portion at which Au is exposed on a noble metal particle surface and calculated from a result of XPS or AES analysis on an inspection target electrode, and a predetermined alternative maldistribution degree index correlated with the Au maldistribution degree and acquired in a non-destructive manner from the gas sensor element heated to a predetermined temperature; acquiring a value of the alternative maldistribution degree index for the inspection target electrode of the gas sensor element while the gas sensor element is heated to the predetermined temperature; and determining whether the Au maldistribution degree satisfies a predetermined standard based on the calibration curve and the acquired inspection value.
    Type: Application
    Filed: June 4, 2018
    Publication date: December 13, 2018
    Inventors: Taku OKAMOTO, Yuki NAKAYAMA, Soichiro YOSHIDA
  • Patent number: 9543953
    Abstract: A semiconductor device includes a first circuit node supplied with a first signal changing between first and second logic levels, a second circuit node supplied with a second signal changing between the first and second logic levels, a third circuit node, a first transistor having a gate electrically connected to the first circuit node and a source-drain path electrically connected between the second and third circuit nodes, the first transistor being rendered conductive when the first signal is at the second logic level, a fourth circuit node supplied with a voltage level being close to or the same as the second logic level, and a second transistor having a gate electrically connected to the first circuit node and a source-drain path electrically connected between the third and fourth circuit nodes, the second transistor being rendered conductive when the first signal is at the first logic level.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: January 10, 2017
    Assignee: LONGITUDE SEMICONDUCTOR S.A.R.L.
    Inventor: Soichiro Yoshida
  • Patent number: 8988958
    Abstract: A single-ended sense amplifier circuit of the invention comprises first and second MOS transistors and first and second precharge circuits. The first MOS transistor drives the bit line to a predetermined voltage and switches connection between the bit line and a sense node and the second MOS transistor whose gate is connected to the sense node amplifies the signal via the first MOS transistor. The first precharge circuit precharges the bit line to a first potential and the second precharge circuit precharges the sense node to a second potential. Before sensing operation, the bit line is driven to the predetermined voltage when the above gate voltage is controlled to decrease. The predetermined voltage is appropriately set so that a required voltage difference at the sense node between high and low levels can be obtained near a changing point between charge transfer/distributing modes.
    Type: Grant
    Filed: June 17, 2014
    Date of Patent: March 24, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Kazuhiko Kajigaya, Soichiro Yoshida, Yasutoshi Yamada
  • Patent number: 8982652
    Abstract: A single-ended sense amplifier circuit of the invention comprises first and second MOS transistors and first and second precharge circuits. The first MOS transistor drives the bit line to a predetermined voltage and switches connection between the bit line and a sense node and the second MOS transistor whose gate is connected to the sense node amplifies the signal via the first MOS transistor. The first precharge circuit precharges the bit line to a first potential and the second precharge circuit precharges the sense node to a second potential. Before sensing operation, the bit line is driven to the predetermined voltage when the above gate voltage is controlled to decrease. The predetermined voltage is appropriately set so that a required voltage difference at the sense node between high and low levels can be obtained near a changing point between charge transfer/distributing modes.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 17, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Kazuhiko Kajigaya, Soichiro Yoshida, Yasutoshi Yamada
  • Patent number: 8976612
    Abstract: A single-ended sense amplifier circuit of the invention comprises first and second MOS transistors and first and second precharge circuits. The first MOS transistor drives the bit line to a predetermined voltage and switches connection between the bit line and a sense node and the second MOS transistor whose gate is connected to the sense node amplifies the signal via the first MOS transistor. The first precharge circuit precharges the bit line to a first potential and the second precharge circuit precharges the sense node to a second potential. Before sensing operation, the bit line is driven to the predetermined voltage when the above gate voltage is controlled to decrease. The predetermined voltage is appropriately set so that a required voltage difference at the sense node between high and low levels can be obtained near a changing point between charge transfer/distributing modes.
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: March 10, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Kazuhiko Kajigaya, Soichiro Yoshida, Yasutoshi Yamada
  • Patent number: 8971140
    Abstract: A semiconductor device comprises a sense amplifier circuit amplifying a signal transmitted through the bit line, first/second data lines transmitting the signal amplified by the sense amplifier circuit, a read amplifier circuit driven by a first voltage and amplifying the signal; first/second switch circuits controlling connection between the above components, first/second voltage setting circuits setting the second/third data lines to a second voltage lower than the first voltage. A predetermined voltage obtained by adding the second voltage to a threshold voltage of a transistor in the second/third switch circuit is applied to the gate terminal thereof, and ends of the data lines are connected to the source and drain terminals thereof.
    Type: Grant
    Filed: July 6, 2012
    Date of Patent: March 3, 2015
    Assignee: PS4 Luxco S.a.r.l.
    Inventors: Soichiro Yoshida, Kazuhiko Kajigaya, Yasutoshi Yamada
  • Publication number: 20150041885
    Abstract: A semiconductor memory device includes: a sense amplifier; a plurality of memory cell arrays; a shared MOS transistor that connects/disconnects the sense amplifier and a bit line included in the memory cell arrays; and a control circuit that controls operation of the shared MOS transistor. A part or whole of an in-sense-amplifier bit line that is a bit line connecting the sense amplifier and the shared MOS transistor is embedded in a semiconductor substrate.
    Type: Application
    Filed: October 24, 2014
    Publication date: February 12, 2015
    Inventors: Soichiro Yoshida, Yoshimitsu Yanagawa, Tomonori Sekiguchi, Akira Kotabe
  • Patent number: 8872258
    Abstract: A semiconductor memory device includes: a sense amplifier; a plurality of memory cell arrays; a shared MOS transistor that connects/disconnects the sense amplifier and a bit line included in the memory cell arrays; and a control circuit that controls operation of the shared MOS transistor. A part or whole of an in-sense-amplifier bit line that is a bit line connecting the sense amplifier and the shared MOS transistor is embedded in a semiconductor substrate.
    Type: Grant
    Filed: January 26, 2012
    Date of Patent: October 28, 2014
    Assignee: PS4 Luxco S.A.R.L.
    Inventors: Soichiro Yoshida, Yoshimitsu Yanagawa, Tomonori Sekiguchi, Akira Kotabe
  • Publication number: 20140293721
    Abstract: A single-ended sense amplifier circuit of the invention comprises first and second MOS transistors and first and second precharge circuits. The first MOS transistor drives the bit line to a predetermined voltage and switches connection between the bit line and a sense node and the second MOS transistor whose gate is connected to the sense node amplifies the signal via the first MOS transistor. The first precharge circuit precharges the bit line to a first potential and the second precharge circuit precharges the sense node to a second potential. Before sensing operation, the bit line is driven to the predetermined voltage when the above gate voltage is controlled to decrease. The predetermined voltage is appropriately set so that a required voltage difference at the sense node between high and low levels can be obtained near a changing point between charge transfer/distributing modes.
    Type: Application
    Filed: June 17, 2014
    Publication date: October 2, 2014
    Applicant: PS4 Luxco S.a.r.l.
    Inventors: Kazuhiko KAJIGAYA, Soichiro YOSHIDA, Yasutoshi YAMADA
  • Publication number: 20140063992
    Abstract: A semiconductor device includes a plurality of memory cell arrays each including a plurality of memory cells and a first bit line coupled to the memory cells, a second bit line, a first voltage line, a plurality of first sense amplifiers each including a first transistor of which a gate is coupled to the first bit line of a corresponding one of the memory cell arrays and a second transistor, the first and second transistors in each of the first sense amplifiers being coupled in series between the second bit line and the first voltage line, a temperature detection circuit configured to detect a temperature of the semiconductor device, and a control circuit configured to receive an output of the temperature detection circuit and to supply a control signal to the gate of each of the second transistors.
    Type: Application
    Filed: November 5, 2013
    Publication date: March 6, 2014
    Applicant: ELPIDA MEMORY, INC
    Inventor: Soichiro YOSHIDA
  • Publication number: 20130328590
    Abstract: A semiconductor device includes a first circuit node supplied with a first signal changing between first and second logic levels, a second circuit node supplied with a second signal changing between the first and second logic levels, a third circuit node, a first transistor having a gate electrically connected to the first circuit node and a source-drain path electrically connected between the second and third circuit nodes, the first transistor being rendered conductive when the first signal is at the second logic level, a fourth circuit node supplied with a voltage level being close to or the same as the second logic level, and a second transistor having a gate electrically connected to the first circuit node and a source-drain path electrically connected between the third and fourth circuit nodes, the second transistor being rendered conductive when the first signal is at the first logic level.
    Type: Application
    Filed: August 14, 2013
    Publication date: December 12, 2013
    Applicant: Elpida Memory, Inc.
    Inventor: Soichiro Yoshida
  • Patent number: 8605524
    Abstract: A semiconductor device includes a memory cell, a first bit line coupled to the memory cell, a second bit line, a first sense amplifier circuit including first and second transistors, the first transistor including a gate coupled to the first bit line, and the first and second transistors are coupled in series between the second bit line and a first voltage line, a temperature detection circuit configured to detect a temperature of the semiconductor device, and a control circuit configured to receive an output of the temperature detection circuit and supply a control signal to a gate of the second transistor.
    Type: Grant
    Filed: October 16, 2012
    Date of Patent: December 10, 2013
    Assignee: Elpida Memory, Inc.
    Inventor: Soichiro Yoshida