Abstract: A display device includes a display area, a first region, and a second region between the display area and the first region. The display device includes: main island portions in the display area and apart from each other in a first direction and a second direction crossing the first direction; a first portion in the first region; first peripheral island portions in the second region and apart from each other in the first direction and the second direction; first peripheral bridge portions, each connecting two first peripheral island portions adjacent to each other in the first direction; and second peripheral bridge portions, each connecting two first peripheral island portions adjacent to each other in the second direction. Each of the plurality of second peripheral bridge portions includes a first second peripheral bridge portion and a second second peripheral bridge portion apart from each other in the first direction.

Abstract: A driving circuit includes a plurality of stages. The plurality of stages are arranged in a plurality of island portions, at least one signal line connected to the stages may include at least one first conductive line disposed in first directional bridge portions and at least one second conductive line disposed in second directional bridge portions, and the at least one second conductive line may extend across the plurality of island portions.

Abstract: A stage of a driving circuit includes seventh and eighth transistors electrically connected between a first terminal for receiving a first voltage and a second terminal for receiving a second voltage that is lower than the first voltage, ninth and tenth transistors electrically connected between the first and second terminals, and a fourth transistor including a gate electrically connected to a first node configured to receive the start signal and a back gate electrically connected to a third node, and electrically connected between the second terminal and a second node to which a gate of the eighth transistor is electrically connected, a fifth transistor electrically connected between the first node and the third node, and including a gate electrically connected to the second terminal, and a second capacitor electrically connected to the third node and to a second output node between the ninth and tenth transistors.

Abstract: A display device including: a base layer having a display region and a non-display region; a circuit layer on the base layer; and an element layer on the circuit layer, the element layer including light emitting elements and light receiving elements corresponding to the display region, wherein the circuit layer includes: pixel drive circuits connected to the light emitting elements; sensor drive circuits connected to the light receiving elements; data lines connected to the pixel drive circuits; first readout lines connected to a first group of sensor drive circuits among the sensor drive circuits; second readout lines spaced apart from the first readout lines in a first direction and connected to a second group of sensor drive circuits among the sensor drive circuits; and connecting lines electrically connected with the second readout lines, respectively, in the display region.

Abstract: A gate driver includes a plurality of stages. Each of the plurality of stages includes a first transistor which transmits an input signal to a control node, a second transistor including a gate connected to an inverting control node, a first terminal which receives a high gate voltage, and a second terminal connected to an output node from which a gate signal is output, a third transistor including a gate connected to the control node, a first terminal which receives a low gate voltage or a clock signal, and a second terminal connected to the output node, and a fourth transistor, which is an NMOS transistor, connected between a terminal of the first transistor and the gate of the sixth transistor, including a gate which receives a global signal having the high gate voltage in an address scan period and the low gate voltage in a self-scan period.

Abstract: A display device includes a base layer having a display region and a non-display region defined therein; a circuit layer on the base layer; and an element layer on the circuit layer, the element layer comprising light emitting elements and light receiving elements corresponding in position to the display region. The circuit layer comprises: pixel drive circuits connected to the light emitting elements; sensor drive circuits connected to the light receiving elements; data lines connected to the pixel drive circuits; readout wirings connected to the sensor drive circuits; a shielding electrode overlapping with the readout wirings and the sensor drive circuits in a plan view, the shielding electrode being on the data lines; and pixel connecting electrodes connecting the pixel drive circuits to the light emitting elements, the pixel connecting electrodes being at a same layer as the shielding electrode.

Abstract: Provided is an electronic device that includes a display device. The display device has a first pixel and a second pixel. Each of the first pixel and the second pixel may include a light emitting element, a driving transistor connected to the light emitting element and a power line and controlled by a voltage of a first node, a switching transistor connected to a data line and a second node and controlled by a write scan signal, a capacitor connected to the first node and the second node, and a bias transistor connected to the driving transistor and a bias line, and controlled by a bias scan signal. The first and second pixels may share the bias transistor.

Abstract: A display device includes a base layer having a display region and a non-display region, a circuit layer on the base layer, and an element layer on the circuit layer and including light emitting elements and light receiving elements corresponding to the display region. The circuit layer includes pixel drive circuits connected to the light emitting elements, sensor drive circuits connected to the light receiving elements, readout lines connected to the sensor drive circuits, first data lines connected to a first group of pixel drive circuits from among the pixel drive circuits, second data lines spaced from the first data lines in a first direction and connected to a second group of pixel drive circuits from among the pixel drive circuits, and data connecting lines electrically connected with the second data lines, respectively, in the display region.

Abstract: According to one or more embodiments, a driving circuit includes a plurality of stage groups and each of the plurality of stage groups includes a control stage and a plurality of output stages connected to the control stage. The control stage controls voltages of a first node and a second node, and each of the plurality of output stages is connected to the first node and the second node to share the control stage and outputs an output signal according to the voltages of the first node and the second node.

Abstract: A display apparatus includes a pixel, a gate driver and a data driver. The gate driver includes: an applying transistor applying a previous carry signal to a transmitter in response to a clock signal; the transmitter applying the previous carry signal to a pull-down control node; a pull-up controller connected to the transmitter and controlling a pull-up control node; a pull-down transistor applying a low voltage to an output node in response to a pull-down control node voltage; a pull-up transistor applying a high voltage to the output node in response to a pull-up control node voltage; a carry pull-down transistor applying a carry low voltage to a carry node in response to the pull-up control node voltage; and a carry pull-up transistor applying a carry high voltage to the carry node in response to the pull-up control node voltage. The carry low voltage is higher than the low voltage.

Abstract: Provided is a display device including a first pixel and a second pixel. Each of the first pixel and the second pixel may include a light emitting element, a driving transistor connected to the light emitting element and a power line and controlled by a voltage of a first node, a switching transistor connected to a data line and a second node and controlled by a write scan signal, a capacitor connected to the first node and the second node, and a bias transistor connected to the driving transistor and a bias line, and controlled by a bias scan signal. The first and second pixels may share the bias transistor.

Abstract: A gate driver includes a plurality of stages. Each of the plurality of stages includes a first transistor which transmits an input signal to a control node, a second transistor including a gate connected to an inverting control node, a first terminal which receives a high gate voltage, and a second terminal connected to an output node from which a gate signal is output, a third transistor including a gate connected to the control node, a first terminal which receives a low gate voltage or a clock signal, and a second terminal connected to the output node, and a fourth transistor, which is an NMOS transistor, connected between a terminal of the first transistor and the gate of the sixth transistor, including a gate which receives a global signal having the high gate voltage in an address scan period and the low gate voltage in a self-scan period.

Abstract: A stage of a driving circuit includes seventh and eighth transistors electrically connected between a first terminal for receiving a first voltage and a second terminal for receiving a second voltage that is lower than the first voltage, ninth and tenth transistors electrically connected between the first and second terminals, and a fourth transistor including a gate electrically connected to a first node configured to receive the start signal and a back gate electrically connected to a third node, and electrically connected between the second terminal and a second node to which a gate of the eighth transistor is electrically connected, a fifth transistor electrically connected between the first node and the third node, and including a gate electrically connected to the second terminal, and a second capacitor electrically connected to the third node and to a second output node between the ninth and tenth transistors.

Abstract: A display apparatus includes a display panel, a gate driver, a data driver and an emission driver. The display panel includes a pixel. The gate driver provides a gate signal to the pixel. The data driver provides a data voltage to the pixel. The emission driver provides an emission signal to the pixel. The pixel includes a light emitting element, a driving switching element which applies a driving current to the light emitting element, a storage capacitor connected to a control electrode of the driving switching element and a bias capacitor including a first electrode connected to the storage capacitor and a second electrode which receives a bias gate signal. A waveform of the bias gate signal varies based on an off ratio representing a ratio of an off period of the emission signal in a frame period.

Abstract: Provided is a display device including a first pixel and a second pixel. Each of the first pixel and the second pixel may include a light emitting element, a driving transistor connected to the light emitting element and a power line and controlled by a voltage of a first node, a switching transistor connected to a data line and a second node and controlled by a write scan signal, a capacitor connected to the first node and the second node, and a bias transistor connected to the driving transistor and a bias line, and controlled by a bias scan signal. The first and second pixels may share the bias transistor.

Abstract: A display device includes a base layer, a circuit layer, and an element layer that is located on the circuit layer and that includes a light emitting element and a light receiving element. The circuit layer includes pixel drive circuits, sensor drive circuits, scan lines, and reset control lines. Lengths of the sensor drive circuits are greater than lengths of the pixel drive circuits. The scan lines are arranged in units of one pixel row. The reset control lines are arranged in units of p pixel rows, and p is greater than or equal to 2.

Abstract: A display device includes a base layer having a display region and a non-display region defined therein; a circuit layer on the base layer; and an element layer on the circuit layer, the element layer comprising light emitting elements and light receiving elements corresponding in position to the display region. The circuit layer comprises: pixel drive circuits connected to the light emitting elements; sensor drive circuits connected to the light receiving elements; data lines connected to the pixel drive circuits; readout wirings connected to the sensor drive circuits; a shielding electrode overlapping with the readout wirings and the sensor drive circuits in a plan view, the shielding electrode being on the data lines; and pixel connecting electrodes connecting the pixel drive circuits to the light emitting elements, the pixel connecting electrodes being at a same layer as the shielding electrode.

Abstract: A display device includes a base layer, a circuit layer, and an element layer. The circuit layer includes pixel driving circuits connected to light emitting elements, sensor driving circuits connected to light receiving elements, and read-out wirings connected to the sensor driving circuits. A first pixel driving circuit from among the pixel driving circuits is continuously arranged in a direction parallel to the read-out wirings, and the first pixel driving circuit is connected to a first light emitting element from among the light emitting elements. The circuit layer further includes a first pixel connection electrode connecting the first pixel driving circuit to the first light emitting element, and the first pixel connection electrode does not cross the read-out wirings in a plan view.

Abstract: A pixel includes a first transistor including a gate terminal connected to a first node, a first terminal, and a second terminal connected to a second node, a second transistor including a gate terminal which receives a first gate signal, a first terminal which receives a data voltage, and a second terminal connected to the first node, a third transistor including a gate terminal which receives a second gate signal, a first terminal which receives a first power voltage, and a second terminal connected to the second terminal of the first transistor, a first capacitor including first and second terminals connected to the first and second nodes, respectively, a second capacitor including a first terminal which receives the first power voltage, and a second terminal connected to the second node, and a light emitting element connected to the second node and which receives a second power voltage.

Abstract: Disclosed is a display device which includes a first-first line that extends in a first direction, a first-second line that extends in a second direction crossing the first direction and that is connected to the first-first line, a data line that extends in the first direction and that is connected to the first-second line, a pixel connected to the data line, a receiving line that extends in the first direction, a sensor connected to the receiving line, and a shielding electrode that overlaps the first-second line and the receiving line.