Abstract: A clock generation apparatus generates a synchronous clock based on an input analog signal. The average of maximum and minimum values of a digital signal in a predetermined period is used as a threshold. Rise and fall times which are times when the threshold and an approximated line of two values of the digital signal crosses are detected. The time intervals between the adjacent rise and fall times are obtained during a predetermined period. The minimum value of the time intervals is used as the input rate. The synchronous clock is output on the basis of the input rate and the rise and fall times. The synchronous clock and a comparison signal which is obtained by comparing the threshold and the digital signal are supplied to a latch circuit, thereby outputting a synchronous signal.