Patents by Inventor Sokratis Sgouridis
Sokratis Sgouridis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11515264Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.Type: GrantFiled: May 24, 2019Date of Patent: November 29, 2022Assignee: Infineon Technologies AGInventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
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Publication number: 20220359428Abstract: A method for processing a semiconductor wafer is proposed. The method may include: reducing a thickness of the semiconductor wafer; before or after reducing the thickness of the semiconductor wafer, placing a carrier structure at a first side of the semiconductor wafer; and after reducing the thickness of the semiconductor wafer, providing a support structure at a second side of the semiconductor wafer opposite to the first side. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.Type: ApplicationFiled: July 20, 2022Publication date: November 10, 2022Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
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Publication number: 20210253421Abstract: A method for producing MEMS components comprises generating a carrier having a plurality of recesses. An adhesive structure is arranged on the carrier and in the recesses. A semiconductor wafer is generated, which has a plurality of MEMS structures arranged at the first main surface of the semiconductor wafer. The adhesive structure is attached to the first main surface of the semiconductor wafer, with the recesses being arranged above the MEMS structures and the adhesive structure not contacting the MEMS structures. The semiconductor wafer is singulated into a plurality of MEMS components by applying a mechanical dicing process.Type: ApplicationFiled: February 8, 2021Publication date: August 19, 2021Inventors: Andre BROCKMEIER, Markus BERGMEISTER, Bernhard GOLLER, Daniel PIEBER, Sokratis SGOURIDIS
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Publication number: 20200385264Abstract: In a method of generating a microelectromechanical system, MEMS, device, a MEMS substrate including a movable element is provided. A glass cover member including a glass cover is formed by hot embossing. The glass cover member is bonded to the MEMS substrate so as to hermetically seal by the glass cover a cavity in which the movable element is arranged.Type: ApplicationFiled: June 2, 2020Publication date: December 10, 2020Applicant: Infineon Technologies AGInventors: Andre BROCKMEIER, Rafael JANSKI, Boris KIRILLOV, Marten OLDSEN, Clemens ROESSLER, Francisco Javier SANTOS RODRIGUEZ, Sokratis SGOURIDIS, Kurt SORSCHAG
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Publication number: 20190363057Abstract: A method for processing a semiconductor wafer is proposed. The method may include reducing a thickness of the semiconductor wafer. A carrier structure is placed on a first side of the semiconductor wafer, e.g. before or after reducing the thickness of the semiconductor wafer. The method further includes providing a support structure on a second side of the semiconductor wafer opposite to the first side, e.g. after reducing the thickness of the semiconductor wafer. Methods for welding a support structure onto a semiconductor wafer are proposed. Further, semiconductor composite structures with support structures welded onto a semiconductor wafer are proposed.Type: ApplicationFiled: May 24, 2019Publication date: November 28, 2019Inventors: Francisco Javier Santos Rodriguez, Alexander Breymesser, Erich Griebl, Michael Knabl, Matthias Kuenle, Andreas Moser, Roland Rupp, Hans-Joachim Schulze, Sokratis Sgouridis, Stephan Voss
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Patent number: 9708182Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.Type: GrantFiled: August 28, 2015Date of Patent: July 18, 2017Assignee: Infineon Technologies AGInventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
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Patent number: 9417186Abstract: Some embodiments of the present disclosure relate to an infrared (IR) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The IR sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit. The radiation input conduit couples radiation into the silicon waveguide, while the radiation output conduit couples radiation out from the silicon waveguide. The silicon waveguide conveys the IR radiation from the radiation input conduit to the radiation output conduit at a single mode. As the radiation is conveyed by the silicon waveguide, an evanescent field is formed that extends outward from the silicon waveguide to interact with a sample positioned between the radiation input conduit and the radiation output conduit.Type: GrantFiled: August 30, 2012Date of Patent: August 16, 2016Assignee: Infineon Technologies AGInventors: Bernhard Jakoby, Ventsislav Lachiev, Thomas Grille, Peter Irsigler, Ursula Hedenig, Sokratis Sgouridis, Thomas Krotscheck Ostermann
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Publication number: 20150368097Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.Type: ApplicationFiled: August 28, 2015Publication date: December 24, 2015Inventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
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Patent number: 9139427Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.Type: GrantFiled: April 17, 2013Date of Patent: September 22, 2015Assignee: Infineon Technologies AGInventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
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Patent number: 8735277Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.Type: GrantFiled: September 8, 2010Date of Patent: May 27, 2014Assignee: Infineon Technologies AGInventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis
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Publication number: 20140061677Abstract: Some embodiments of the present disclosure relate to an infrared (IR) opto-electronic sensor having a silicon waveguide implemented on a single silicon integrated chip. The IR sensor has a semiconductor substrate having a silicon waveguide extends along a length between a radiation input conduit and a radiation output conduit. The radiation input conduit couples radiation into the silicon waveguide, while the radiation output conduit couples radiation out from the silicon waveguide. The silicon waveguide conveys the IR radiation from the radiation input conduit to the radiation output conduit at a single mode. As the radiation is conveyed by the silicon waveguide, an evanescent field is formed that extends outward from the silicon waveguide to interact with a sample positioned between the radiation input conduit and the radiation output conduit.Type: ApplicationFiled: August 30, 2012Publication date: March 6, 2014Applicant: Infineon Technologies AGInventors: Bernhard Jakoby, Ventsislav Lachiev, Thomas Grille, Peter Irsigler, Sokratis Sgouridis, Ursula Hedenig, Thomas Krotscheck Ostermann
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Publication number: 20130270658Abstract: A method for producing at least one cavity within a semiconductor substrate includes dry etching the semiconductor substrate from a surface of the semiconductor substrate at at least one intended cavity location in order to obtain at least one provisional cavity. The method includes depositing a protective material with regard to a subsequent wet-etching process at the surface of the semiconductor substrate and at cavity surfaces of the at least one provisional cavity. Furthermore, the method includes removing the protective material at least at a section of a bottom of the at least one provisional cavity in order to expose the semiconductor substrate. This is followed by electrochemically etching the semiconductor substrate at the exposed section of the bottom of the at least one provisional cavity. A method for producing a micromechanical sensor system in which this type of cavity formation is used and a corresponding MEMS are also disclosed.Type: ApplicationFiled: April 17, 2013Publication date: October 17, 2013Applicant: Infineon Technologies AGInventors: Andreas Behrendt, Kai-Alexander Schreiber, Sokratis Sgouridis, Martin Zgaga, Bernhard Winkler
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Patent number: 7868452Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.Type: GrantFiled: May 26, 2006Date of Patent: January 11, 2011Assignee: Infineon Technologies AGInventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis
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Publication number: 20100330744Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.Type: ApplicationFiled: September 8, 2010Publication date: December 30, 2010Inventors: Dirk Muller, Manfred Schneegans, Sokratis Sgouridis
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Patent number: 7723158Abstract: In a method for producing bases with external contacts for surface mounting on circuit mounts, bases with external contacts are electrodeposited on semiconductor wafers or semiconductor chips. Subsequently, electrodeposited bases with external contacts are heat treated on the semiconductor wafers or the semiconductor chips at temperatures below the melting temperature of the deposited contact base material. Thereafter, a so-called RTP process is carried out in the form of a high-temperature interval in which the melting temperature is reached. Subsequently, the surfaces of the bases with external contacts are wet etched, the overall method being terminated by a cooling and drying operation. The bases with external contacts thus produced can be reliably surface mounted on circuit mounts.Type: GrantFiled: October 25, 2006Date of Patent: May 25, 2010Assignee: Infineon Technologies AGInventors: Thomas Gutt, Sokratis Sgouridis
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Publication number: 20070111527Abstract: In a method for producing bases with external contacts for surface mounting on circuit mounts, bases with external contacts are electrodeposited on semiconductor wafers or semiconductor chips. Subsequently, electrodeposited bases with external contacts are heat treated on the semiconductor wafers or the semiconductor chips at temperatures below the melting temperature of the deposited contact base material. Thereafter, a so-called RTP process is carried out in the form of a high-temperature interval in which the melting temperature is reached. Subsequently, the surfaces of the bases with external contacts are wet etched, the overall method being terminated by a cooling and drying operation. The bases with external contacts thus produced can be reliably surface mounted on circuit mounts.Type: ApplicationFiled: October 25, 2006Publication date: May 17, 2007Inventors: Thomas Gutt, Sokratis Sgouridis
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Publication number: 20060292849Abstract: The invention relates to an ultrathin semiconductor circuit having contact bumps and to a corresponding production method. The semiconductor circuit includes a bump supporting layer having a supporting layer thickness and having a supporting layer opening for uncovering a contact layer element being formed on the surface of a semiconductor circuit. An electrode layer is situated on the surface of the contact layer element within the opening of the bump supporting layer, on which electrode layer is formed a bump metallization for realizing the contact bump. On account of the bump supporting layer, a thickness of the semiconductor circuit can be thinned to well below 300 micrometers, with the wafer reliably being prevented from breaking. Furthermore, the moisture barrier properties of the semiconductor circuit are thereby improved.Type: ApplicationFiled: May 26, 2006Publication date: December 28, 2006Inventors: Dirk Mueller, Manfred Schneegans, Sokratis Sgouridis