Patents by Inventor Solti Peng
Solti Peng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240235588Abstract: Described herein are systems with switchable circuitry configured to selectively couple transmitter outputs to processing hardware, which may selectively route subsets of distortion measurements from transmitters for DPD processing that compensates for the measured distortion. The switchable nature of the distortion measurement propagation paths permits the paths to be made substantially shorter than static paths, resulting in improved (e.g., reduced and/or more uniform) attenuation and/or phase change across a transceiver array. In one example, measurement propagation paths may be no longer than a row or column of the array. In some embodiments, systems described herein may be suitable for implementation at mmW transmit and/or receive frequencies, where the length of measurement paths may have a significant impact on attenuation and phase changes.Type: ApplicationFiled: June 13, 2023Publication date: July 11, 2024Applicant: MediaTek Inc.Inventors: Solti Peng, Jenwei Ko
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Publication number: 20240235587Abstract: Described herein are phased array and transceiver systems with distortion measurement circuitry configured to obtain distortion measurements of system transmitters and provide the distortion measurements to receive beamforming components of the system. Such systems advantageously make use of existing beamforming components of the system to additionally route distortion measurements for baseband DPD processing. Such systems may not need external components to measure signals radiated by antennas of the system or dedicated paths linking system transmitters directly to a baseband processor. In some embodiments, receive beamforming components may be configured to sum distortion measurements from each transmitter to create an aggregate distortion measurement usable as representative of the average transmitter for DPD processing.Type: ApplicationFiled: June 13, 2023Publication date: July 11, 2024Applicant: MediaTek Inc.Inventors: Solti Peng, Jenwel Ko, Caiyi Wang
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Publication number: 20240137053Abstract: Described herein are phased array and transceiver systems with distortion measurement circuitry configured to obtain distortion measurements of system transmitters and provide the distortion measurements to receive beamforming components of the system. Such systems advantageously make use of existing beamforming components of the system to additionally route distortion measurements for baseband DPD processing. Such systems may not need external components to measure signals radiated by antennas of the system or dedicated paths linking system transmitters directly to a baseband processor. In some embodiments, receive beamforming components may be configured to sum distortion measurements from each transmitter to create an aggregate distortion measurement usable as representative of the average transmitter for DPD processing.Type: ApplicationFiled: June 12, 2023Publication date: April 25, 2024Applicant: Media Tek Inc.Inventors: Solti Peng, Jenwel Ko, Caiyi Wang
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Publication number: 20240137054Abstract: Described herein are systems with switchable circuitry configured to selectively couple transmitter outputs to processing hardware, which may selectively route subsets of distortion measurements from transmitters for DPD processing that compensates for the measured distortion. The switchable nature of the distortion measurement propagation paths permits the paths to be made substantially shorter than static paths, resulting in improved (e.g., reduced and/or more uniform) attenuation and/or phase change across a transceiver array. In one example, measurement propagation paths may be no longer than a row or column of the array. In some embodiments, systems described herein may be suitable for implementation at mmW transmit and/or receive frequencies, where the length of measurement paths may have a significant impact on attenuation and phase changes.Type: ApplicationFiled: June 12, 2023Publication date: April 25, 2024Applicant: MediaTek Inc.Inventors: Solti Peng, Jenwei Ko
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Patent number: 8669754Abstract: A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.Type: GrantFiled: April 6, 2011Date of Patent: March 11, 2014Assignee: Icera Inc.Inventors: Abdellatif Bellaouar, Arul Balasubramaniyan, Solti Peng
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Publication number: 20120256613Abstract: A power supply noise rejection circuit for functional circuits, such as a voltage controlled oscillator (VCO). The power supply noise rejection circuit includes an isolation transistor connected to a voltage supply for providing an output current and voltage substantially free of noise across the full frequency range. A current source, a diode connected reference transistor with resistance means connected between its gate and drain terminals, and a dummy circuit serially connected between the voltage supply and ground generate a bias voltage that is applied to the gate of the isolation transistor. The dummy circuit mimics the DC characteristics of the functional circuit such that the output current tracks with process and temperature variations. The isolation transistor and the reference transistor can have negative threshold voltages, and the circuit can include bleed means for drawing current from the gate of the reference transistor and isolation transistor.Type: ApplicationFiled: April 6, 2011Publication date: October 11, 2012Applicant: Icera Inc.Inventors: Abdellatif Bellaouar, Arul Balasubramaniyan, Solti Peng
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Patent number: 8045944Abstract: A downconversion mixer includes a configurable gate or bulk bias voltage to allow calibration and correction of device offsets. Calibration may be performed on the configurable bias voltages to minimize IM2 distortion in the mixer. The techniques have minimal impact on voltage headroom, impose no requirement for a signal path to be phase-matched with a calibration path, and are particularly well-suited for passive mixers.Type: GrantFiled: September 28, 2007Date of Patent: October 25, 2011Assignee: QUALCOMM IncorporatedInventors: Wei Zhuo, Roger Brockenbrough, Solti Peng
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Patent number: 7936217Abstract: A complementary amplifier includes an NMOS transistor coupled to a PMOS transistor in a stacked configuration. The NMOS transistor and the PMOS transistor receive and amplify an input signal. The NMOS and PMOS transistors operate as a linear complementary amplifier and provide an output signal. The NMOS and PMOS transistors may have separate bias voltages, which may be selected to overlap the low-to-high and high-to-low transitions of the transconductances of these transistors. The width and length dimensions of the NMOS and PMOS transistors may be selected to match the change in input capacitance and the change in transconductance of the NMOS transistor in moderate inversion region with the change in input capacitance and the change in transconductance of the PMOS transistor in moderate inversion region. The complementary amplifier may have an approximately constant total input capacitance and an approximately constant total transconductance over a range of voltages.Type: GrantFiled: November 29, 2007Date of Patent: May 3, 2011Assignee: QUALCOMM, IncorporatedInventors: Junxiong Deng, Gurkanwal Singh Sahota, Solti Peng
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Patent number: 7865164Abstract: A noise isolation passive mixing apparatus is designed to mitigate noise contribution from intermediate frequency (IF) filters and amplifiers in a radio frequency translation stage. Common-gate configuration devices are inserted between passive mixer output and input of a transimpedance amplifier. In this way, circulation of the input-referred noise of the transimpedance amplifier is decreased, because of the relatively high output impedance of the common-gate devices, and the noise figure of the mixing apparatus can be improved. Since the radio frequency signal still sees low impedance, a radio frequency transconductance (RF gm) stage can be removed from the mixing apparatus, reducing current consumption. A double-balanced mixing apparatus with this general architecture may be implemented in a 0.18 micrometer CMOS technology and used in a low-IF global positioning system operating at 1.575 GHz, in an access terminal of a cellular communication system, and in other systems.Type: GrantFiled: September 27, 2007Date of Patent: January 4, 2011Assignee: QUALCOMM IncorporatedInventors: Yang Xu, Solti Peng
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Patent number: 7826816Abstract: A method according to one embodiment includes using a quadrature set of local oscillator signals having duty cycles of substantially less than fifty percent to perform a mixing operation on a radio-frequency current signal. Other embodiments include using a quadrature set of local oscillator signals having duty cycles of less than twenty-five percent.Type: GrantFiled: September 13, 2006Date of Patent: November 2, 2010Assignee: QUALCOMM IncorporatedInventors: Wei Zhuo, Aristotele Hadjichristos, Gurkanwal S. Sahota, Solti Peng
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Patent number: 7769361Abstract: A frequency converter according to one embodiment includes a quadrature pair of passive mixers whose input terminals are coupled to a differential radio-frequency input via the channel regions of transistors that are arranged to operate in the saturation region.Type: GrantFiled: September 14, 2006Date of Patent: August 3, 2010Assignee: QUALCOMM IncorporatedInventors: Wei Zhuo, Solti Peng
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Publication number: 20090140812Abstract: A complementary amplifier includes an NMOS transistor coupled to a PMOS transistor in a stacked configuration. The NMOS transistor and the PMOS transistor receive and amplify an input signal. The NMOS and PMOS transistors operate as a linear complementary amplifier and provide an output signal. The NMOS and PMOS transistors may have separate bias voltages, which may be selected to overlap the low-to-high and high-to-low transitions of the transconductances of these transistors. The width and length dimensions of the NMOS and PMOS transistors may be selected to match the change in input capacitance and the change in transconductance of the NMOS transistor in moderate inversion region with the change in input capacitance and the change in transconductance of the PMOS transistor in moderate inversion region. The complementary amplifier may have an approximately constant total input capacitance and an approximately constant total transconductance over a range of voltages.Type: ApplicationFiled: November 29, 2007Publication date: June 4, 2009Applicant: QUALCOMM IncorporatedInventors: Junxiong Deng, Gurkanwal Singh Sahota, Solti Peng
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Publication number: 20090088122Abstract: A noise isolation passive mixing apparatus is designed to mitigate noise contribution from intermediate frequency (IF) filters and amplifiers in a radio frequency translation stage. Common-gate configuration devices are inserted between passive mixer output and input of a transimpedance amplifier. In this way, circulation of the input-referred noise of the transimpedance amplifier is decreased, because of the relatively high output impedance of the common-gate devices, and the noise figure of the mixing apparatus can be improved. Since the radio frequency signal still sees low impedance, a radio frequency transconductance (RF gm) stage can be removed from the mixing apparatus, reducing current consumption. A double-balanced mixing apparatus with this general architecture may be implemented in a 0.18 micrometer CMOS technology and used in a low-IF global positioning system operating at 1.575 GHz, in an access terminal of a cellular communication system, and in other systems.Type: ApplicationFiled: September 27, 2007Publication date: April 2, 2009Applicant: QUALCOMM INCORPORATEDInventors: Yang Xu, Solti Peng
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Publication number: 20090075622Abstract: A downconversion mixer includes a configurable gate or bulk bias voltage to allow calibration and correction of device offsets. Calibration may be performed on the configurable bias voltages to minimize IM2 distortion in the mixer. The techniques have minimal impact on voltage headroom, impose no requirement for a signal path to be phase-matched with a calibration path, and are particularly well-suited for passive mixers.Type: ApplicationFiled: September 28, 2007Publication date: March 19, 2009Applicant: QUALCOMM INCORPORATEDInventors: Wei Zhuo, Roger Brockenbrough, Solti Peng
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Patent number: 7453142Abstract: A transformer system includes a package substrate having a surface. A plurality of electrically conductive pads are arranged in spaced apart relationship relative to each other on the substrate surface. A first winding is defined by a first electrically conductive path between a first input and a first output, the first electrically conductive path including at least one wire connected between at least one first pad pair of the electrically conductive pads. At least one electrically conductive pad of each first pad pair is at the substrate surface. A second winding is defined by a second electrically conductive path between a second input and a second output, the second electrically conductive path including at least one wire connected between at least one second pad pair of the electrically conductive pads. At least one electrically conductive pad of each second pad pair is at the substrate surface.Type: GrantFiled: December 5, 2005Date of Patent: November 18, 2008Assignee: Texas Instruments IncorporatedInventors: See Taur Lee, Solti Peng, Dirk Leipold, James Fred Salzman
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Publication number: 20080020728Abstract: A frequency converter according to one embodiment includes a quadrature pair of passive mixers whose input terminals are coupled to a differential radio-frequency input via the channel regions of transistors that are arranged to operate in the saturation region.Type: ApplicationFiled: September 14, 2006Publication date: January 24, 2008Inventors: Wei Zhuo, Solti Peng
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Publication number: 20080014896Abstract: A method according to one embodiment includes using a quadrature set of local oscillator signals having duty cycles of substantially less than fifty percent to perform a mixing operation on a radio-frequency current signal. Other embodiments include using a quadrature set of local oscillator signals having duty cycles of less than twenty-five percent.Type: ApplicationFiled: September 13, 2006Publication date: January 17, 2008Inventors: Wei Zhuo, Aristotele Hadjichristos, Gurkanwal S. Sahota, Solti Peng
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Patent number: 7286019Abstract: According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that includes a transistor having a gate biased by an output of the gate bias circuit and also having a source connected to an inductor for providing a path to ground for direct current flowing through the transistor. According to another embodiment of the invention, a method for amplifying a signal by an amplifier includes generating a gate bias voltage indicative of a difference between a reference voltage and an output voltage of the amplifier, biasing the gate of the common-gate amplifier with the gate bias voltage, and blocking, by a passive device, alternating current signals from flowing from the source of the transistor to ground.Type: GrantFiled: January 7, 2005Date of Patent: October 23, 2007Assignee: Texas Instruments IncorporatedInventors: Solti Peng, Chien-Chung Chen, Abdellatif Bellaouar, Heng-Chih Lin
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Publication number: 20070128821Abstract: A transformer system includes a package substrate having a surface. A plurality of electrically conductive pads are arranged in spaced apart relationship relative to each other on the substrate surface. A first winding is defined by a first electrically conductive path between a first input and a first output, the first electrically conductive path including at least one wire connected between at least one first pad pair of the electrically conductive pads. At least one electrically conductive pad of each first pad pair is at the substrate surface. A,second winding is defined by a second electrically conductive path between a second input and a second output, the second electrically conductive path including at least one wire connected between at least one second pad pair of the electrically conductive pads. At least one electrically conductive pad of each second pad pair is at the substrate surface.Type: ApplicationFiled: December 5, 2005Publication date: June 7, 2007Inventors: See Lee, Solti Peng, Dirk Leipold, James Salzman
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Publication number: 20060152288Abstract: According to one embodiment of the invention, an amplifier includes a gate bias circuit operable to generate a gate bias voltage and a common gate amplifier that includes a transistor having a gate biased by an output of the gate bias circuit and also having a source connected to an inductor for providing a path to ground for direct current flowing through the transistor. According to another embodiment of the invention, a method for amplifying a signal by an amplifier includes generating a gate bias voltage indicative of a difference between a reference voltage and an output voltage of the amplifier, biasing the gate of the common-gate amplifier with the gate bias voltage, and blocking, by a passive device, alternating current signals from flowing from the source of the transistor to ground.Type: ApplicationFiled: January 7, 2005Publication date: July 13, 2006Inventors: Solti Peng, Chien-Chung Chen, Abdellatif Bellaouar, Heng-Chih Lin