Abstract: A fibre channel proxy proxies storage operations in a fibre channel storage network. A first set of fibre channel proxy ports are configured to receive storage operations from one or more initiators. A second set of fibre channel proxy ports are configured to forward the storage operations to one or more storage targets. Fibre channel port identifiers for the storage targets are used to communicate with the initiators during the storage operations over the first set of fibre channel proxy ports. Fibre channel port identifiers for the initiators are used to communicate with the storage targets during the storage operations over the second set of fibre channel proxy ports. This scheme allows the fibre channel to operate transparently in the fibre channel network.

Abstract: A method for synchronizing a distributed system is provided. The distributed system includes distributed analyzers. Each analyzer has a synchronization decoder circuit, a medium access controller, and a central processing unit. The distributed system synchronization method comprises receiving multicast information, generating local synchronization signals, receiving control data packets, and beginning processing of monitored data packets. The synchronization decoder circuit receives the multicast information, decodes the multicast information, and responsive to the multicast information, generates local synchronization signals. The decoder synchronization circuit of a first analyzer completes the decoding and the generating in a first time. The first time is adapted to enable the central processing unit of the first analyzer to start and end processing of monitored data packets at a first start time and a first end time.

Abstract: A method for synchronizing a distributed system is provided. The distributed system includes distributed analyzers. Each analyzer has a synchronization decoder circuit, a medium access controller, and a central processing unit. The distributed system synchronization method comprises receiving multicast information, generating local synchronization signals, receiving control data packets, and beginning processing of monitored data packets. The synchronization decoder circuit receives the multicast information, decodes the multicast information, and responsive to the multicast information, generates local synchronization signals. The decoder synchronization circuit of a first analyzer completes the decoding and the generating in a first time. The first time is adapted to enable the central processing unit of the first analyzer to start and end processing of monitored data packets at a first start time and a first end time.

Abstract: A method for synchronizing a distributed system is provided. The distributed system includes distributed analyzers. Each analyzer has a synchronization decoder circuit, a medium access controller, and a central processing unit. The distributed system synchronization method comprises receiving multicast information, generating local synchronization signals, receiving control data packets, and beginning processing of monitored data packets. The synchronization decoder circuit receives the multicast information, decodes the multicast information, and responsive to the multicast information, generates local synchronization signals. The decoder synchronization circuit of a first analyzer completes the decoding and the generating in a first time. The first time is adapted to enable the central processing unit of the first analyzer to start and end processing of monitored data packets at a first start time and a first end time.

Abstract: The present invention provides method of encoding an electronic memory; multiple digital values are prioritized; respective digital values are associated with respective memory locations of the electronic memory such that there are multiple memory locations each associated with two or more different digital values; and respective digital values are loaded into respective memory locations of the electronic memory in order from lowest priority digital value to highest priority digital value wherein each respective digital value is loaded into all respective memory locations that are associated with such respective digital value.

Abstract: A method and approach for providing improved performance in a CSMA/CD-type network utilizing transmission of block encoded congestion sense signaling to allow full duplex transmission of data over a communication link segment. In addition, the method and apparatus for providing in-band signaling of congestion conditions is described. The improved method and apparatus are implemented with minimal changes to existing standards and allow for compatibility, above the MAC sublayer, with existing installed hardware and software bases.

Abstract: A data communications network providing for a multiport router and providing for use of an asynchronous transfer mode (ATM) switch or the like as a routing backplane or packet switching engine. A router front end formats ATM cells including providing routing information in the cell header. The routing information may comprise, for example, a destination port identifier in the VPI field of the cell header. The ATM switch then switches the cell from an input port, coupled with the router front end to an output port based on the routing information. The ATM switch may also translate the routing information to provide source identification information to the destination. In a described embodiment, the multiport router is used as a backplane bus in a network concentrator.