Patents by Inventor Somit Talwar

Somit Talwar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050067384
    Abstract: Apparatus and method for performing laser thermal annealing (LTA) of a substrate using an annealing radiation beam that is not substantially absorbed in the substrate at room temperature. The method takes advantage of the fact that the absorption of long wavelength radiation (1 micron or greater) in some substrates, such as undoped silicon substrates, is a strong function of temperature. The method includes heating the substrate to a critical temperature where the absorption of long-wavelength annealing radiation is substantial, and then irradiating the substrate with the annealing radiation to generate a temperature capable of annealing the substrate.
    Type: Application
    Filed: September 29, 2003
    Publication date: March 31, 2005
    Inventors: Somit Talwar, Michael Thompson, Boris Grek, David Markle
  • Publication number: 20050045604
    Abstract: A method and apparatus for performing laser thermal processing (LTP) using a two-dimensional array of laser diodes to form a line image, which is scanned across a substrate. The apparatus includes a two-dimensional array of laser diodes, the radiation from which is collimated in one plane using a cylindrical lens array, and imaged onto the substrate as a line image using an anomorphic, telecentric optical imaging system. The apparatus also includes a scanning substrate stage for supporting a substrate to be LTP processed. The laser diode radiation beam is incident on the substrate at angles at or near the Brewster's angle for the given substrate material and the wavelength of the radiation beam, which is linearly P-polarized. The use of a two-dimensional laser diode array allows for a polarized radiation beam of relatively high energy density to be delivered to the substrate, thereby allowing for LTP processing with good uniformity, reasonably short dwell times, and thus reasonably high throughput.
    Type: Application
    Filed: September 2, 2003
    Publication date: March 3, 2005
    Inventors: Somit Talwar, David Markle
  • Patent number: 6825101
    Abstract: A method of this invention includes annealing at least one region of a substrate with a short pulse of particles. The particles can be electrons, protons, alpha particles, other atomic or molecular ions or neutral atoms and molecules. The substrate can be composed of a semiconductor material, for example. The particles can include dopant atoms such as p-type dopant atoms such as boron (B), aluminum (Al), gallium (Ga), or indium (In), and n-type dopant atomic species including arsenic (As), phosphorus (P), or antimony (Sb). The particles can also include silicon (Si) or germanium (Ge) atoms or ionized gas atoms including those of hydrogen (He), oxygen (O), nitrogen (N), neon (Ne), argon (Ar), or krypton (Kr). The particles can be used to anneal dopant atoms previously implanted into the substrate.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: November 30, 2004
    Assignee: Ultratech, Inc.
    Inventors: Andrew M. Hawryluk, David A. Markle, Somit Talwar
  • Publication number: 20040188396
    Abstract: Apparatus and methods for thermally processing a substrate with scanned laser radiation are disclosed. The apparatus includes a continuous radiation source and an optical system that forms an image on a substrate. The image is scanned relative to the substrate surface so that each point in the process region receives a pulse of radiation sufficient to thermally process the region.
    Type: Application
    Filed: February 26, 2004
    Publication date: September 30, 2004
    Inventors: Somit Talwar, David A. Markle
  • Publication number: 20040173585
    Abstract: Apparatus and methods for thermally processing a substrate with scanned laser radiation are disclosed. The apparatus includes a continuous radiation source and an optical system that forms an image on a substrate. The image is scanned relative to the substrate surface so that each point in the process region receives a pulse of radiation sufficient to thermally process the region.
    Type: Application
    Filed: March 22, 2004
    Publication date: September 9, 2004
    Applicant: ULTRATECH STEPPER, INC.
    Inventors: Somit Talwar, Michael O. Thompson, David A. Markle
  • Patent number: 6777317
    Abstract: A method of forming a doped polycrystalline silicon gate in a Metal Oxide Semiconductor (MOS) device. The method includes forming first an insulation layer on a top surface of a crystalline silicon substrate. Next, an amorphous silicon layer is formed on top of and in contact with the insulation layer and then a dopant is introduced in a top surface layer of the amorphous silicon layer. The top surface of the amorphous silicon layer is irradiated with a laser beam and the heat of the radiation causes the top surface layer to melt and initiates explosive recrystallization (XRC) of the amorphous silicon layer. The XRC process transforms the amorphous silicon layer into a polycrystalline silicon gate and distributes the dopant homogeneously throughout the polycrystalline gate.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: August 17, 2004
    Assignee: Ultratech Stepper, Inc.
    Inventors: Cindy Seibel, Somit Talwar
  • Patent number: 6747245
    Abstract: Apparatus and methods for thermally processing a substrate with scanned laser radiation are disclosed. The apparatus includes a continuous radiation source and an optical system that forms an image on a substrate. The image is scanned relative to the substrate surface so that each point in the process region receives a pulse of radiation sufficient to thermally process the region.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 8, 2004
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, Michael O. Thompson, David A. Markle
  • Publication number: 20040084427
    Abstract: Apparatus and methods for thermally processing a substrate with scanned laser radiation are disclosed. The apparatus includes a continuous radiation source and an optical system that forms an image on a substrate. The image is scanned relative to the substrate surface so that each point in the process region receives a pulse of radiation sufficient to thermally process the region.
    Type: Application
    Filed: November 6, 2002
    Publication date: May 6, 2004
    Inventors: Somit Talwar, Michael O. Thompson, David A. Markle
  • Patent number: 6645838
    Abstract: A process for activating a doped region (80) or amorphized doped region (34) in a semiconductor substrate (10). The process includes the steps of doping a region of the semiconductor substrate, wherein the region is crystalline or previously amorphized. The next step is forming a conformal layer (40) atop the upper surface (11) of the substrate. The next step is performing at least one of front-side and backside irradiation of the substrate to activate the doped region. The activation may be achieved by heating the doped region to just below the melting point of the doped region, or by melting the doped region but not the crystalline substrate. An alternative process includes the additional step of forming the doped region (amorphized or unamorphized) within or adjacent a deep dopant region (60) and providing sufficient heat to the deep dopant region through at least one of front-side and backside irradiation so that the doped region is activated through explosive recrystallization.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: November 11, 2003
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, Yun Wang, Michael O. Thompson
  • Patent number: 6635588
    Abstract: Method for controlling heat transferred to a workpiece (W) process region (30) from laser radiation (10) using a thermally induced reflectivity switch layer (60). A film stack (6) is formed having an absorber layer (50) atop the workpiece with a portion covering the process region. The absorber layer absorbs and converts laser radiation into heat. Reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer comprises one or more layers, e.g. thermal insulator and reflectivity transition layers. The reflective switch layer covering the process region has a temperature related to the temperature of the process region. Reflectivity of the switch layer changes from a low to a high reflectivity state at a critical temperature of the process region, limiting radiation absorbed by the absorber layer by reflecting incident radiation when switched. This limits the amount of heat transferred to the process region from the absorber layer.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: October 21, 2003
    Assignee: Ultratech Stepper, Inc.
    Inventors: Andrew M. Hawryluk, Somit Talwar, Yun Wang, Michael O. Thompson
  • Patent number: 6635541
    Abstract: A method of the invention comprises forming a partial absorber layer (PAL) over at least one integrated transistor device formed on a semiconductor substrate, and exposing the PAL to radiant energy. A first portion of the radiant energy passes through the PAL and is absorbed in the source and drain regions adjacent a gate region of the integrated transistor device and in the semiconductor substrate underneath the field isolation regions of the integrated device. A second portion of the radiant energy is absorbed by the PAL and is thermally conducted from the PAL to the source and drain regions. The first and second portions of the radiant energy are sufficient to melt the source and drain regions to anneal the junctions of the integrated device.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: October 21, 2003
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, Yun Wang, Carol Gelatos
  • Patent number: 6570656
    Abstract: The closed loop embodiment includes a pulsed laser controller to selectively operate a pulsed laser in a lower-power probe mode or a higher power operational mode. In lower-power probe mode, values of eT (total radiation energy flooding ICs on a silicon wafer), er (fraction of eT specularly reflected), es (fraction of eT scattered) and es (fraction of eT transmitted through wafer) are obtained. A value for ea (fraction of eT absorbed wafer) is calculated i.e. ea=eT−(er+es+et), and ea used by pulsed laser controller with pulsed laser in higher power operational mode to adjust pulsed laser fluence over the duration of a pulse to provide flooding radiation energy sufficient to melt an amorphized silicon surface layer beneath radiation-absorbent material, yet insufficient to melt crystalline silicon or ablate radiation-absorbent material. Open loop embodiment substitutes a separate low-power probe laser for operation in lower-power probe mode.
    Type: Grant
    Filed: April 10, 2000
    Date of Patent: May 27, 2003
    Assignee: Ultratech Stepper, Inc.
    Inventors: James B. Owens, Jr., Somit Talwar, Andrew M. Hawryluk, Yun Wang
  • Publication number: 20030045074
    Abstract: A method of forming a doped polycrystalline silicon gate in a Metal Oxide Semiconductor (MOS) device. The method includes forming first an insulation layer on a top surface of a crystalline silicon substrate. Next, an amorphous silicon layer is formed on top of and in contact with the insulation layer and then a dopant is introduced in a top surface layer of the amorphous silicon layer. The top surface of the amorphous silicon layer is irradiated with a laser beam and the heat of the radiation causes the top surface layer to melt and initiates explosive recrystallization (XRC) of the amorphous silicon layer. The XRC process transforms the amorphous silicon layer into a polycrystalline silicon gate and distributes the dopant homogeneously throughout the polycrystalline gate.
    Type: Application
    Filed: August 29, 2001
    Publication date: March 6, 2003
    Inventors: Cindy Seibel, Somit Talwar
  • Patent number: 6495390
    Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.
    Type: Grant
    Filed: August 27, 2001
    Date of Patent: December 17, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Andrew M. Hawryluk, Somit Talwar, Yun Wang, Michael O. Thompson
  • Patent number: 6479821
    Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with a pulse of radiation (10), which may be in the form of a scanning beam (B), using a thermally induced phase switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs radiation and converts the absorbed radiation into heat. The phase switch layer is deposited above or below the absorber layer. The phase switch layer may comprise one or more thin film layers, and may include a thermal insulator layer and a phase transition layer. Because they are in close proximity, the portion of the phase switch layer covering the process region has a temperature that is close to the temperature of the process region. The phase of the phase switch layer changes from a first phase (e.g.
    Type: Grant
    Filed: September 11, 2000
    Date of Patent: November 12, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Andrew M. Hawryluk, Somit Talwar, Yun Wang, David A. Markle, Michael O. Thompson
  • Patent number: 6420264
    Abstract: A method of forming a silicide region (80) on a Si substrate (10) in the manufacturing of semiconductor integrated devices, a method of forming a semiconductor device (MISFET), and a device having suicide regions formed by the present method. The method of forming a suicide region involves forming a silicide region (80) in the (crystalline) Si substrate having an upper surface (12) and a lower surface (14). The method comprises the steps of first forming an amorphous doped region (40) in the Si substrate at or near the upper surface, to a predetermined depth (d). This results in the formation of an amorphous-crystalline interface (I) between the amorphous doped region and the crystalline Si substrate. The next step is forming a metal layer (60) atop the Si substrate upper surface, in contact with the amorphous doped region. The next step involves performing backside irradiation with a first radiation beam (66).
    Type: Grant
    Filed: June 28, 2001
    Date of Patent: July 16, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, Yun Wang
  • Patent number: 6388297
    Abstract: A shallow trench isolation (STI) structure (170, 300), formed in a silicon substrate (110) for use in sub-micron integrated circuit devices, for providing enhanced absorption of a wavelength of laser light during laser annealing. The STI structure includes a shallow trench (140) having a depth of 0.5 &mgr;m or less etched in the silicon substrate, and an optical blocking member (174, 304) that includes an insulator (144, 224) formed in the shallow trench and designed to reflect or absorb the wavelength of laser light to mitigate redistribution of the dopant and/or recrystallization of a portion of the silicon substrate. Methods of forming the optical blocking member are also disclosed.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: May 14, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, John Cronin
  • Patent number: 6387803
    Abstract: The invented method produces a silicide region on a silicon body that is useful for a variety of purposes, including the reduction of the electrical contact resistance to the silicon body or an integrated electronic device formed thereon. The invented method includes a step of producing an amorphous region on the silicon body using ion implantation, for example, a step of forming a metal layer such as titanium, cobalt or nickel in contact with the amorphous region, and a step of irradiating the metal with intense light from a source such as a laser, to cause metal atoms to diffuse into the amorphous region to form an alloy region with a silicide composition. In an application of the invented method to the manufacture of a MISFET device, the metal layer is preferably formed with a thickness that is at least sufficient to produce a stoichiometric proportion of metal and silicon atoms in the amorphous region of the gate of the MISFET device.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: May 14, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, Gaurav Verma, Karl-Josef Kramer, Kurt Weiner
  • Patent number: 6383956
    Abstract: A method, apparatus and system for controlling the amount of heat transferred to a process region (30) of a workpiece (W) from exposure with laser radiation (10) using a thermally induced reflectivity switch layer (60). The apparatus of the invention is a film stack (6) having an absorber layer (50) deposited atop the workpiece, such as a silicon wafer. A portion of the absorber layer covers the process region. The absorber layer absorbs laser radiation and converts the absorbed radiation into heat. A reflective switch layer (60) is deposited atop the absorber layer. The reflective switch layer may comprise one or more thin film layers, and preferably includes a thermal insulator layer and a transition layer. The portion of the reflective switch layer covering the process region has a temperature that corresponds to the temperature of the process region.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: May 7, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Andrew M. Hawryluk, Somit Talwar, Yun Wang, Michael O. Thompson
  • Patent number: 6380044
    Abstract: A high-speed semiconductor transistor and process for forming same. The process includes forming, in a Si substrate (10), spaced apart shallow trench isolations (STIs) (20), and a gate (36) atop the substrate between the STIs. Then, regions (40,44) of the substrate on either side of the gate are either amorphized and doped, or just doped. In certain embodiments of the invention, extension regions (60,62 or 60′,62′) and deep drain and deep source regions (80, 84 or 80′,84′) are formed. In other embodiments, just deep drain and deep source regions (80, 84 or 80′, 84′) are formed. A conformal layer (106) is then formed atop the substrate, covering the substrate surface (11) and the gate. The conformal layer can serve to absorb light and/or to distribute heat to the underlying structures. Then, at least one of front-side irradiation (110) and back-side irradiation (116) is performed to activate the drain and source regions and, if present, the extensions.
    Type: Grant
    Filed: April 12, 2000
    Date of Patent: April 30, 2002
    Assignee: Ultratech Stepper, Inc.
    Inventors: Somit Talwar, Yun Wang, Michael O. Thompson