Abstract: A storage system includes at least one solid-state drive (SSD) and a baseboard management controller (BMC). The at least one SSD communicates over a communication link information that the at least one SSD includes a predetermined number of super capacitors in which the predetermined number includes 0, and is capable of providing a mode of operation to flush data in a non-volatile memory to a non-volatile memory that spans a predetermined amount of time if a loss of power condition is detected. The BMC device receives the information from the SSD and in response sends a message to the at least on SSD to enter the mode of operation.

Abstract: A storage system includes at least one solid-state drive (SSD) and a baseboard management controller (BMC). The at least one SSD communicates over a communication link information that the at least one SSD includes a predetermined number of super capacitors in which the predetermined number includes 0, and is capable of providing a mode of operation to flush data in a non-volatile memory to a non-volatile memory that spans a predetermined amount of time if a loss of power condition is detected. The BMC device receives the information from the SSD and in response sends a message to the at least on SSD to enter the mode of operation.

Abstract: A storage system includes at least one solid-state drive (SSD) and a baseboard management controller (BMC). The at least one SSD communicates over a communication link information that the at least one SSD includes a predetermined number of super capacitors in which the predetermined number includes 0, and is capable of providing a mode of operation to flush data in a non-volatile memory to a non-volatile memory that spans a predetermined amount of time if a loss of power condition is detected. The BMC device receives the information from the SSD and in response sends a message to the at least on SSD to enter the mode of operation.

Abstract: A SAS target device, e.g., SAS disk, may instantiate an asynchronous event notification (AEN) transaction while still conforming to SAS protocol standards. When the SAS target has an event queued up for notification to a host controller but there is no host initiated communication going on for the SAS target to attach the notification, then the SAS target may start an AEN timer. If the AEN timer expires and the AEN is still pending, then a request is made to the SAS target to notify the host controller using a SAS PHY level out of band (OOB) mechanism. The OOB message may be sent via a new OOB signal or by sending a COMINIT signal from the SAS disk PHY, requiring a link reset and then using a bit in an IDENTIFY frame for the pending AEN. Receiving and issuing an AEN may then be communicated during PHY initialization.

Abstract: Determining whether there exists an input-output (I/O) fabric conflict (mismatch) between a blade I/O fabric daughter card of a blade compute module and an I/O interface module of a blade compute module system, and if a conflicts does exit then taking action to correct this I/O fabric mismatch. An I/O fabric router may be coupled between the blade I/O fabric daughter cards and the system I/O interface modules. If a matching I/O interface fabric exists then the I/O fabric router will couple the blade I/O fabric daughter card to the matching I/O interface fabric. If there is no matching I/O interface fabric then the blade I/O fabric daughter card may be decoupled from the blade compute module system so that the associated blade compute module may otherwise function, and an alert may be sent regarding the I/O fabric conflict (absence of an I/O fabric match) for the I/O fabric daughter card of the blade compute module.

Abstract: For dynamically cooling an input/output (I/O) controller, a presence of the I/O controller is automatically detected. The I/O controller includes an electronic component capable of generating heat that is greater than a predefined amount when the electronic component is operating in a predefined state. The I/O controller provides a control output in response to a demand indicative of operating the electronic component in the predefined state. The control output is provided to a baseboard management controller (BMC) that is capable of providing additional cooling to the I/O controller in response to the control signal.

Abstract: A blade server module in an information handling system may have secure environment and authorized removal modes in non-volatile memory. If the secure environment mode is set in the blade server module, then the authorized removal mode is read to determine whether it also is set. If both of these modes are set then authentication keys of the inserted blade server module and blade server chassis are verified as being properly associated. If the authorized removal mode is not set when the blade server module is inserted into a server chassis or authentication keys are not verified as being properly associated then the blade server module power-up sequence is disabled. The authentication keys may be administrator/user defined. The secure environment and authorized removal modes may be set and cleared by the administrator/user.

Abstract: An SAS RAID adapter comprises an input-output processor (IOP) and at least two SAS input-output controllers (IOCs). Wherein SAS links coupled to each of the IOCs form “virtual ports” in order to increase performance and maintain availability. The virtual ports across the at least two IOCs have wide port SAS link capability so as to provide performance enhancements similar to a standard SAS wide port. Even if a single IOC failure occurs, downshifting to N/2 links is provided with degraded aggregated bandwidth (data throughput) instead of a failover and/or system shutdown.

Abstract: Prioritization of power throttling of servers in an information handling system may be based upon slot or location priority, subscription priority, and/or greatest power usage. A power system having a capacity of less than the maximum connected power load is monitored to determine the power being drawn therefrom. When the power drawn from the power supply system exceeds a first threshold, power throttling requests are issued to the appropriate servers until the power drawn from the power supply is less than a second threshold. The second threshold less than the first threshold. The appropriate servers may be configurable e.g., determined by a configurable prioritization schedule.

Abstract: A method of providing data security between RAID controller and disk drives is disclosed. In accordance with one embodiment, a method of providing data security between a redundant array of inexpensive/independent disk (RAID) controller and disk drives in an information handling system includes assigning a key from a plurality of keys in the RAID controller. The key scrambles data written to a disk drive in a RAID. The method further including scrambling the data sent from the RAID controller to the disk drive such that the scrambling operably changes the pattern of the data written to the disk drive such that the data is readable from the disk drive by using the key to descramble the data. The method further including storing the data on the disk drive, reading the data from the disk drive and unscrambling the data received from the disk drive based on the key.

Abstract: A system, apparatus and method for an efficiently performing address lookups and switching for computer networks is disclosed. The present disclosure provides for address translation between network devices utilizing different protocols. The system, apparatus and method described herein provide for address translation for encapsulated communications to enable mixed protocol communications using a network switch fabric system.

Abstract: A system, apparatus and method for an efficiently performing address lookups and switching for computer networks is disclosed. The present disclosure provides for address translation between network devices utilizing different protocols. The system, apparatus and method described herein provide for address translation for encapsulated communications to enable mixed protocol communications using a network switch fabric system.

Abstract: A cache system and method in accordance with the invention includes a cache near the target devices and another cache at the requesting host side so that the data traffic across the computer network is reduced. A cache updating and invalidation method are described.

Abstract: A core logic chip set is provided in a computer system to provide a bridge between host and memory buses and an accelerated graphics port ("AGP") bus adapted for operation of two AGP devices, or one AGP device and one peripheral component interconnect ("PCI") device. A common AGP bus having provisions for the PCI and AGP interface signals is connected to the core logic chip set and the AGP and/or PCI device(s). The core logic chip set has an AGP/PCI arbiter having Request ("REQ") and Grant ("GNT") signal lines for each AGP and/or PCI device connected to the AGP bus. Another embodiment has a plurality of AGP buses for a plurality of AGP devices. This allows concurrent operation for AGP devices connected to different AGP buses. Two of the AGP buses may be combined to connect to one 64 bit PCI device.

Abstract: A method for arbitrating between processor and host bus snoop accesses to a cache subsystem in a multiprocessor system where the processor does not allow for processor cycle aborts. When a processor access and a snoop access both occur and no tag access or tag modify cycle is currently being performed, the snoop access is given priority over the processor access. After an initial arbitration, if any, the processor and snoop accesses alternate tag access if both processor and snoop accesses are active. This balances any wait states incurred between the processor and the host bus and ensures that neither bus is locked out by continual accesses by the other. In addition, tag modify cycles are generally run immediately after the tag access cycles that initiate them.