Patents by Inventor Somsubhra Sikdar

Somsubhra Sikdar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060174058
    Abstract: A system and method comprising a buffer configured to receive a data stream, a parser configured to parse the data stream from the buffer, and one or more processing units configured to co-process the data stream from the buffer responsive to the parsing by the parser, and then provide at least a portion of the processed data stream back to the buffer for additional parsing by the parser.
    Type: Application
    Filed: March 14, 2006
    Publication date: August 3, 2006
    Inventors: Somsubhra Sikdar, Kevin Rowett, Rajesh Nair, Komal Rathi
  • Publication number: 20060168324
    Abstract: A device comprises a plurality of interface circuits configured for communicating between a semantic processing unit and a memory and a selection circuit for selecting an interface circuit allocated to a semantic processing unit for processing a data operation request in the memory.
    Type: Application
    Filed: July 13, 2005
    Publication date: July 27, 2006
    Applicant: Mistletoe Technologies, Inc.
    Inventors: Somsubhra Sikdar, Kevin Rowett, Hoai Tran, Jonathan Sweedler, Komal Rathi, Mike Davoudi
  • Publication number: 20060168309
    Abstract: A devices and method for parsing a data stream comprises a parser stack configured to store one or more parsing symbols, each parsing symbol representing a different state of data stream parsing, a table interface configured to retrieve one or more production rules from a production rule table according to the parsing symbols, and a state machine configured to control the parsing of a data stream according to the retrieved production rules.
    Type: Application
    Filed: February 28, 2006
    Publication date: July 27, 2006
    Applicant: Mistletoe Technologies, Inc.
    Inventors: Somsubhra Sikdar, Kevin Rowett, Rajesh Nair, Komal Rathi
  • Patent number: 7062568
    Abstract: Method and apparatus are disclosed for flow control over Point-to-Point Protocol (PPP) data links. A method of negotiating such flow control between two PPP peers is disclosed, along with methods for operating flow control across a PPP link. In one embodiment, flow control frames carry an IEEE802.3x MAC control frame payload—the PPP implementation repackages such frames as MAC control frames and passes them to a MAC, which performs flow control. In another embodiment, flow control frames allow flow control commands to be applied differently to different service classes such that PPP flow can be controlled on a per-class basis.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: June 13, 2006
    Assignee: Forcelo Networks, Inc.
    Inventors: Tissa Senevirathne, Somsubhra Sikdar
  • Publication number: 20060031555
    Abstract: Embodiments of a multiple-parsing-context parser and semantic processor are shown and described. The described embodiments allow an input data stream to be parsed in multiple contexts, with the parser switching between contexts as the input data stream dictates. For instance, one embodiment allows a SONET input data stream, including multiple interleaved payloads and SONET transport overhead, to be parsed using multiple grammars, with control passing between the grammars and contexts in a single pass. This approach allows a reconfigurable semantic processor to serve different payload arrangements for a complex multiplexed SONET stream.
    Type: Application
    Filed: August 4, 2005
    Publication date: February 9, 2006
    Inventors: Somsubhra Sikdar, Kevin Rowett
  • Publication number: 20060026377
    Abstract: A device comprises a plurality of interface circuits for communicating between a semantic processor and a memory. Each interface circuit is configured for receiving lookup requests from the semantic processor. The device further comprises a buffer for allocating an interface circuit, if available, to the semantic processor. The allocated interface circuit is selected to access the memory for processing the lookup request.
    Type: Application
    Filed: July 13, 2005
    Publication date: February 2, 2006
    Inventors: Somsubhra Sikdar, Kevin Rowett, Hoai Tran, Jonathan Sweedler, Komal Rathi, Mike Davoudi
  • Publication number: 20060026378
    Abstract: A device performs lookup functions for a semantic processing unit. The device comprises a plurality of interface circuits for receiving data operation requests from the semantic processing unit. The device comprises a buffer for allocating an interface circuit to a semantic processing unit having a data operation request. A selection circuit, coupled between the plurality of interface circuits and a memory unit, selects an allocated circuit for accessing the memory unit to process the data operation request.
    Type: Application
    Filed: July 13, 2005
    Publication date: February 2, 2006
    Inventors: Somsubhra Sikdar, Kevin Rowett, Hoai Tran, Jonathan Sweedler, Komal Rathi, Mike Davoudi
  • Publication number: 20060020756
    Abstract: A memory subsystem includes multiple different caches configured for different types of data transfer operations between one or more processing units and a main memory. The different caches can include a first general cache configured for general random memory accesses, a software controlled cache used for controlling cache operations for different processing devices accessing the same data, and a streaming cache configured for large packet data memory accesses. An arbiter may be used for arbitrating requests by the multiple different caches for accessing the main memory.
    Type: Application
    Filed: July 13, 2005
    Publication date: January 26, 2006
    Inventors: Hoai Tran, Kevin Rowett, Somsubhra Sikdar, Jonathan Sweedler, Caveh Jalali
  • Publication number: 20060010193
    Abstract: A system and method for parsing a data stream comprises a production rule table populated with production rules, a parser table populated with production rule codes that correspond to production rules within the production rule table, and a direct execution parser to identify production rule codes in the parser table and to retrieve production rules from the production rule table according to the identified production rule codes, the direct execution parser is operable to parse a data stream according to the retrieved production rules.
    Type: Application
    Filed: July 14, 2005
    Publication date: January 12, 2006
    Applicant: Mistletoe Technologies, Inc.
    Inventors: Somsubhra Sikdar, Kevin Rowett, Rajesh Nair, Komal Rathi
  • Publication number: 20050281281
    Abstract: A system and device are disclosed for operating an interface circuit. The interface circuit comprises a buffer for buffering data, a parser interface for sending at least a portion of the buffered data to a direct execution parser, and a processing interface for sending at least a portion of the buffered data to a semantic processing unit. The system comprises a plurality of input buffers for buffering received data, a direct execution parser configured to parse the data in the input buffers in response to symbols in a parser stack, and a plurality of semantic processing units each configured to perform operations on data in the different input buffers according to commands from the direct execution parser.
    Type: Application
    Filed: July 13, 2005
    Publication date: December 22, 2005
    Inventors: Rajesh Nair, Komal Rathi, Somsubhra Sikdar, Kevin Rowett
  • Publication number: 20050268032
    Abstract: A storage server uses a semantic processor to parse and respond to client requests. A direct execution parser in the semantic processor parses an input stream, comprising client storage server requests, according to a defined grammar. A semantic processor execution engine capable of manipulating data (e.g., data movement, mathematical, and logical operations) executes microcode segments in response to requests from the direct execution parser in order to perform the client-requested operations. The resulting operational efficiency allows an entire storage server to be collapsed in some embodiments into a few relatively small integrated circuits that can be placed on a media device's printed circuit board, with the semantic processor itself drawing perhaps a few Watts of power.
    Type: Application
    Filed: May 11, 2004
    Publication date: December 1, 2005
    Inventors: Somsubhra Sikdar, Kevin Rowett
  • Publication number: 20050216770
    Abstract: An Intrusion Detection System (IDS) can be embedded in different network processing devices distributed throughout a network. In one example, a Reconfigurable Semantic Processor (RSP) performs the intrusion detection operations in multiple network routers, switches, servers, etc. that are distributed throughout a network. The RSP conducts the intrusion detection operations at network line rates without having take scanning operations offline. The RSP generates tokens that identify different syntactic elements in the data stream that may be associated with a virus or other type of malware. The tokens are in essence a by-product of the syntactic parsing that is already performed by the RSP. This allows virus or other types of malware detection to be performed with relatively little additional processing overhead.
    Type: Application
    Filed: May 9, 2005
    Publication date: September 29, 2005
    Applicant: Mistletoe Technologies, Inc.
    Inventors: Kevin Rowett, Somsubhra Sikdar
  • Patent number: 6944159
    Abstract: Transparent point-to-point connectivity is provided between an incoming interface on an ingress node and an outgoing interface on an egress node in a network. An address associated with the egress node is circulated to the nodes in the network and a next hop address toward the egress node address is determined at each node. A label value is circulated along with the egress node address to the nodes. Examples of label values can include VLAN Ids or Multi-protocol Label Switching (MPLS) labels. If data is received having the label value, the node receiving the data identifies the next hop address associated with that label value and transfers the data to the next hop associated with the identified next hop address.
    Type: Grant
    Filed: April 12, 2001
    Date of Patent: September 13, 2005
    Assignee: Force10 Networks, Inc.
    Inventors: Shivi Fotedar, Rajeev V. Manur, Somsubhra Sikdar
  • Publication number: 20040148415
    Abstract: Data processors and methods for their configuration and use are disclosed. As opposed to traditional von Neumann microprocessors, the disclosed processors are semantic processors—they parse an input stream and direct one or more semantic execution engines to execute code segments, depending on what is being parsed. For defined-structure input streams such as packet data streams, these semantic processors can be both economical and fast as compared to a von Neumann system. Several optional components can augment device operation. For instance, a machine context data interface relieves the semantic execution engines from managing physical memory, allows the orderly access to memory by multiple engines, and implements common access operations. Further, a simple von Neumann exception-processing unit can be attached to a semantic execution engine to execute more complicated, but infrequent or non-time-critical operations.
    Type: Application
    Filed: January 24, 2003
    Publication date: July 29, 2004
    Applicant: Mistletoe Technologies, Inc.
    Inventor: Somsubhra Sikdar
  • Patent number: 6745277
    Abstract: A network processing device intelligently interleaves packets for read and write access requests in a multibank memory. The system intelligently writes packets into the different memory banks so that the same memory bank is not used for back-to-back packet reads. The last memory bank write is determined for each output queue. This write information is used in combination with look ahead packet read information for a group of packets from the next output queue scheduled to read packets from memory. The scheduler uses all this information to avoid any back-to-back packet read, write, or read/write accesses to the same memory bank. This intelligent packet interleaving scheme preserves memory bus bandwidth normally wasted accessing the same memory banks.
    Type: Grant
    Filed: October 4, 2000
    Date of Patent: June 1, 2004
    Assignee: Force10 Networks, Inc.
    Inventors: Eugene Lee, Somsubhra Sikdar
  • Publication number: 20020048280
    Abstract: A data rate controller controls a rate that data is transferred over a backplane in a network processing device. A bandwidth allocator allocates bandwidth to an input port for transmitting data over the backplane to an output port. A bandwidth limiter identifies a maximum allowable bandwidth the input port is allocated on the backplane. A bandwidth tracker identifies an amount of bandwidth currently allocated to the input port for transmitting data over the backplane to the output port. When the current allocated bandwidth is used up, the data rate controller prevents that input port from connecting to output ports through the backplane until more bandwidth is allocated.
    Type: Application
    Filed: August 15, 2001
    Publication date: April 25, 2002
    Inventors: Eugene Lee, Somsubhra Sikdar, Andy Liu, Ann Gui
  • Patent number: 5916305
    Abstract: Data communication packets are processed to determined whether they match network protocols using a parser table and a predictive parser. The parser table is encoded from production rules derived from a network protocol definition. Packets comprise data elements each having an offset from the beginning of the packet and a data value. The parser table is indexed by these offsets and data values, each location in the table containing a value indicating whether a data element at the offset and having the data value is a valid element for the network protocol definition. Once encoded, the parser table is used with the predictive parser which receives data elements of a data packet from a network source. The predictive parser uses the offset and data value of each data element to obtain the encoded value in the parser table. The predictive parser updates a parser stack according to the value from the parser table and the current value of the parser stack.
    Type: Grant
    Filed: November 5, 1996
    Date of Patent: June 29, 1999
    Assignee: Shomiti Systems, Inc.
    Inventors: Somsubhra Sikdar, Jagannath N. Raghu