Abstract: One or more embodiments are directed to establishing electrical connections through silicon wafers with low resistance and high density, while at the same time maintaining processability for further fabrication. Such connections through silicon wafers enable low resistance connections from the top side of a silicon wafer to the bottom side of the silicon wafer.

Abstract: One or more embodiments are directed to establishing electrical connections through silicon wafers with low resistance and high density, while at the same time maintaining processability for further fabrication. Such connections through silicon wafers enable low resistance connections from the top side of a silicon wafer to the bottom side of the silicon wafer.

Abstract: A method of fabricating vapor cells comprises forming a plurality of vapor cell dies in a first wafer having an interior surface region and a perimeter, and forming a plurality of interconnected vent channels in the first wafer. The vent channels provide at least one pathway for gas from each vapor cell die to travel outside of the perimeter of the first wafer. The method further comprises anodically bonding a second wafer to one side of the first wafer, and anodically bonding a third wafer to an opposing side of the first wafer. The vent channels allow gas toward the interior surface region of the first wafer to be in substantially continuous pressure-equilibrium with gas outside of the perimeter of the first wafer during the anodic bonding of the second and third wafers to the first wafer.

Abstract: A method of fabricating one or more vapor cells comprises forming one or more vapor cell dies in a first wafer having a first diameter, and anodically bonding a second wafer to a first side of the first wafer over the vapor cell dies, the second wafer having a second diameter. A third wafer is positioned over the vapor cell dies on a second side of the first wafer opposite from the second wafer, with the third wafer having a third diameter. A sacrificial wafer is placed over the third wafer, with the sacrificial wafer having a diameter that is larger than the first, second and third diameters. A metallized bond plate is located over the sacrificial wafer. The third wafer is anodically bonded to the second side of the first wafer when a voltage is applied to the metallized bond plate while the sacrificial wafer is in place.

Abstract: A method of fabricating vapor cells comprises forming a plurality of vapor cell dies in a first wafer having an interior surface region and a perimeter, and forming a plurality of interconnected vent channels in the first wafer. The vent channels provide at least one pathway for gas from each vapor cell die to travel outside of the perimeter of the first wafer. The method further comprises anodically bonding a second wafer to one side of the first wafer, and anodically bonding a third wafer to an opposing side of the first wafer. The vent channels allow gas toward the interior surface region of the first wafer to be in substantially continuous pressure-equilibrium with gas outside of the perimeter of the first wafer during the anodic bonding of the second and third wafers to the first wafer.

Abstract: A method of fabricating vapor cells comprises forming a plurality of vapor cell dies in a first wafer having an interior surface region and a perimeter, and forming a plurality of interconnected vent channels in the first wafer. The vent channels provide at least one pathway for gas from each vapor cell die to travel outside of the perimeter of the first wafer. The method further comprises anodically bonding a second wafer to one side of the first wafer, and anodically bonding a third wafer to an opposing side of the first wafer. The vent channels allow gas toward the interior surface region of the first wafer to be in substantially continuous pressure-equilibrium with gas outside of the perimeter of the first wafer during the anodic bonding of the second and third wafers to the first wafer.

Abstract: A method to construct a chip-scale atomic clock is provided. The method comprises providing a scaffolding for components in a chip-scale atomic clock. The components include a laser and at least one other component. The method also includes operationally positioning the components on the scaffolding so that an emitting surface of the laser is non-parallel to partially reflective surfaces of the at least one other component.

Abstract: Designs and processes for thermally stabilizing a vertical cavity surface emitting laser (vcsel) in a chip-scale atomic clock are provided. In one embodiment, a Chip-Scale Atomic Clock includes: a vertical cavity surface emitting laser (vcsel); a heater block coupled to a base of the vcsel; a photo detector; a vapor cell, wherein the vapor cell includes a chamber that defines at least part of an optical path for laser light between the vcsel and the photo detector; and an iso-thermal cage surrounding the vcsel on all sides, the iso-thermal cage coupled to the heater block via a thermally conductive path.

Abstract: A chip-scale atomic clock comprises a physics package and a laser die located in a first thermal zone of the physics package. A quarter wave plate is mounted in the physics package and is in optical communication with the laser die. A vapor cell is mounted in the physics package and is in optical communication with the quarter wave plate. The vapor cell is located in a second thermal zone that is independent from the first thermal zone. An optical detector is mounted in the physics package and is in optical communication with the vapor cell. The first thermal zone provides a first operation temperature at a first stability point associated with the laser die, and the second thermal zone provides a second operation temperature at a second stability point associated with the vapor cell.

Abstract: A method of fabricating vapor cells comprises forming a plurality of vapor cell dies in a first wafer having an interior surface region and a perimeter, and forming a plurality of interconnected vent channels in the first wafer. The vent channels provide at least one pathway for gas from each vapor cell die to travel outside of the perimeter of the first wafer. The method further comprises anodically bonding a second wafer to one side of the first wafer, and anodically bonding a third wafer to an opposing side of the first wafer. The vent channels allow gas toward the interior surface region of the first wafer to be in substantially continuous pressure-equilibrium with gas outside of the perimeter of the first wafer during the anodic bonding of the second and third wafers to the first wafer.

Abstract: Designs and processes for thermally stabilizing a vertical cavity surface emitting laser (vcsel) in a chip-scale atomic clock are provided. In one embodiment, a Chip-Scale Atomic Clock includes: a vertical cavity surface emitting laser (vcsel); a heater block coupled to a base of the vcsel; a photo detector; a vapor cell, wherein the vapor cell includes a chamber that defines at least part of an optical path for laser light between the vcsel and the photo detector; and an iso-thermal cage surrounding the vcsel on all sides, the iso-thermal cage coupled to the heater block via a thermally conductive path.

Abstract: A method to construct a chip-scale atomic clock is provided. The method comprises providing a scaffolding for components in a chip-scale atomic clock. The components include a laser and at least one other component. The method also includes operationally positioning the components on the scaffolding so that an emitting surface of the laser is non-parallel to partially reflective surfaces of the at least one other component.

Abstract: Apparatus and methods for alkali vapor cells are provided. In one embodiment, a vapor cell for a Chip-Scale Atomic Clocks (CSAC) comprises a silicon wafer having defined within a first chamber, a second chamber, and a pathway connecting the first chamber to the second chamber; a first glass wafer anodically-bonded to a first surface of the silicon wafer; a second glass wafer anodically-bonded to an opposing second surface of the silicon wafer, wherein the first chamber defines an optical path through the vapor cell; and an alkali metal material deposited into the second chamber. The pathway connecting the first chamber to the second chamber is configured with a geometry that is at least partially inhibitive to alkali metal vapor flow.

Abstract: A chip-scale atomic clock comprises a physics package and a laser die located in a first thermal zone of the physics package. A quarter wave plate is mounted in the physics package and is in optical communication with the laser die. A vapor cell is mounted in the physics package and is in optical communication with the quarter wave plate. The vapor cell is located in a second thermal zone that is independent from the first thermal zone. An optical detector is mounted in the physics package and is in optical communication with the vapor cell. The first thermal zone provides a first operation temperature at a first stability point associated with the laser die, and the second thermal zone provides a second operation temperature at a second stability point associated with the vapor cell.

Abstract: A flow sensor system and a method for fabricating the same. A substrate is provided, comprising a detector wafer upon which a flow sensor is formed. One or more shells can then be configured upon the substrate whose walls form a flow channel. The flow channel is fabricated directly upon the substrate in a manner that allows the flow channel to couple heat transfer directly to the flow sensor in order to eliminate the need for two or more different types of sacrificial layers during the fabrication of the flow sensor upon the substrate and in which the shell(s) is coupled with fluidic measurement to provide for the flow sensor.

Abstract: Miniature optically transparent windows are disclosed that extend vertically from a plane, which may be used to transmit light traveling in a direction substantially parallel with the plane. In one illustrative embodiment, a method for forming such miniature optically transparent windows includes: providing a substrate having a first surface and an opposing second surface, the substrate having a first layer and an adjacent second layer; forming a recess in the first layer of the substrate, the recess extending to the second layer; providing an optically transparent material in the recess to form an optically transparent feature; and removing at least a portion of the first layer that extends adjacent the optically transparent feature so that light can pass through the optically transparent feature in a direction that is substantially parallel to the first surface of the substrate.

Abstract: A flow sensor system and a method for fabricating the same. A substrate is provided, comprising a detector wafer upon which a flow sensor is formed. One or more shells can then be configured upon the substrate whose walls form a flow channel. The flow channel is fabricated directly upon the substrate in a manner that allows the flow channel to couple heat transfer directly to the flow sensor in order to eliminate the need for two or more different types of sacrificial layers during the fabrication of the flow sensor upon the substrate and in which the shell(s) is coupled with fluidic measurement to provide for the flow sensor.

Abstract: Miniature optically transparent windows are disclosed that extend vertically from a plane, which may be used to transmit light traveling in a direction substantially parallel with the plane. In one illustrative embodiment, a method for forming such miniature optically transparent windows includes: providing a substrate having a first surface and an opposing second surface, the substrate having a first layer and an adjacent second layer; forming a recess in the first layer of the substrate, the recess extending to the second layer; providing an optically transparent material in the recess to form an optically transparent feature; and removing at least a portion of the first layer that extends adjacent the optically transparent feature so that light can pass through the optically transparent feature in a direction that is substantially parallel to the first surface of the substrate.

Abstract: A microcontainer device for micro-electro-mechanical systems such as atomic clocks is provided. The microcontainer device includes a substrate and a cavity in the substrate defined by a sidewall having an upper edge. The cavity is configured to hold a reactive material such as rubidium or cesium. A lid having a lower surface is configured to sealingly cover the cavity. A first hermetic material is disposed around an outer perimeter of the upper edge of the sidewall, and a second hermetic material is disposed around a perimeter of the lower surface of the lid. A sealing material chemically compatible with the reactive material is disposed around an inner perimeter of the upper edge of the sidewall adjacent to the first hermetic material.