Patents by Inventor Sonal A. Srivastava

Sonal A. Srivastava has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9023227
    Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).
    Type: Grant
    Filed: May 25, 2012
    Date of Patent: May 5, 2015
    Assignee: Applied Materials, Inc.
    Inventors: Jivko Dinev, Saravjeet Singh, Khalid M. Sirajuddin, Tong Liu, Puneet Bajaj, Rohit Mishra, Sonal A. Srivastava, Madhava Rao Yalamanchili, Ajay Kumar
  • Publication number: 20140199833
    Abstract: The present disclosure provides methods for via reveal etching process to form through-silicon vias (TSVs) in a substrate. In one embodiment, a method for performing a via reveal process to form through-silicon vias in a substrate includes providing a substrate having partial through-silicon vias formed from a first surface of the substrate into a processing chamber, wherein the partial through-silicon vias formed in the substrate are blind vias, supplying an etching gas mixture including at least a fluorine containing gas and a chlorine containing gas into the processing chamber, and preferentially removing a portion of the substrate from a second surface of the substrate to expose the through-silicon vias until a desired length of the through-silicon vias is exposed from the second surface of the substrate.
    Type: Application
    Filed: January 6, 2014
    Publication date: July 17, 2014
    Applicant: Applied Materials, Inc.
    Inventors: Rohit MISHRA, Khalid Mohiuddin SIRAJUDDIN, Madhava Rao YALAMANCHILI, Sonal A. SRIVASTAVA
  • Publication number: 20130005152
    Abstract: Embodiments described herein generally relate to a substrate processing system and related methods, such as an etching/deposition method. The method comprises (A) depositing a protective layer on a first layer disposed on a substrate in an etch reactor, wherein a plasma source power of 4,500 Watts or greater is applied while depositing the protective layer, (B) etching the protective layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the protective layer, and (C) etching the first layer in the etch reactor, wherein the plasma source power of 4,500 Watts or greater is applied while etching the first layer, wherein a time for the depositing a protective layer (A) comprises less than 30% of a total cycle time for the depositing a protective layer (A), the etching the protective layer (B), and the etching the first layer (C).
    Type: Application
    Filed: May 25, 2012
    Publication date: January 3, 2013
    Applicant: Applied Materials, Inc.
    Inventors: JIVKO DINEV, Saravjeet Singh, Khalid M. Sirajuddin, Tong Liu, Puneet Bajaj, Rohit Mishra, Sonal A. Srivastava, Madhava Rao Yalamanchili, Ajay Kumar