Patents by Inventor Song Yao
Song Yao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240150354Abstract: The present application provides tricyclic urea compounds that modulate the activity of the V617F variant of JAK2, which are useful in the treatment of various diseases, including cancer.Type: ApplicationFiled: August 24, 2023Publication date: May 9, 2024Inventors: Yanran Ai, Onur Atasoylu, Yu Bai, Joseph Barbosa, David M. Burns, Daniel Levy, Brent Douty, Hao Feng, Leah C. Konkol, Cheng-Tsung Lai, Xun Liu, Song Mei, Jun Pan, Haisheng Wang, Liangxing Wu, Wenqing Yao, Eddy W. Yue
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Publication number: 20240128441Abstract: Described herein are carbon-silicon composite structures and methods of producing such structures. A carbon-silicon composite structure comprises one or more carbon-containing structures that have pores at least partially filled with silicon-containing structures. Specifically, the silicon-containing structures are attached to the pore walls while maintaining void spaces within these pores. These void spaces can accommodate silicon expansion during lithiation. Carbon-silicon composite structures can be produced by submerging carbon-containing structures into a precursor liquid solution (comprising a precursor) and driving this solution into the pores. The silicon-containing structures are then formed (from the precursor) within the pores either electrochemically (e.g., by applying a voltage to the solution and structures) or chemically (e.g., by introducing the structures into a reducing liquid solution). In some examples, these void spaces are sealed from the environment by additional structures, e.g.Type: ApplicationFiled: October 17, 2023Publication date: April 18, 2024Applicant: Gru Energy Lab Inc.Inventors: Xiaohua Liu, Xiahui Yao, Sa Zhou, Song Han
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Publication number: 20240104285Abstract: A method is provided and includes several operations: arranging multiple channels extending in a first direction; arranging, in accordance with multiple weights of multiple macros, a first portion of the macro closer to a centroid of a core region of an integrated circuit than a second portion of the macros; and arranging the macros on opposite sides of the channels. The macros have multiple pins coupled to the channels interposed between the macros.Type: ApplicationFiled: December 1, 2023Publication date: March 28, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., TSMC NANJING COMPANY LIMITEDInventors: Yi-Lin CHUANG, Shi-Wen TAN, Song LIU, Shih-Yao LIN, Wen-Yuan FANG
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Publication number: 20240074158Abstract: A variety of applications can include an apparatus having a memory device in which, during fabrication of the memory device, processing a dielectric isolation region about an active area of a memory cell is controlled to provide enhanced electric isolation of a data line contact to the memory cell with respect to a cell contact to the memory cell. A portion of the dielectric isolation region can be recessed, creating a corner between the dielectric isolation region and a conductive region, where the conductive region is material for the active area. The corner can be filled with a dielectric material and the data line contact can be formed contacting the dielectric material and coupled to the conductive region. The cell contact can be formed to the memory cell contacting the dielectric material such that the dielectric material is between the cell contact and the data line contact.Type: ApplicationFiled: August 15, 2023Publication date: February 29, 2024Inventors: Chunhua Yao, Song Guo, Vivek Yadav
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Patent number: 10802992Abstract: The present invention relates to artificial neural network (ANN), for example, convolutional neural network (CNN). In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes a CPU+FPGA heterogeneous architecture to accelerate ANNs.Type: GrantFiled: August 26, 2016Date of Patent: October 13, 2020Assignee: XILINX TECHNOLOGY BEIJING LIMITEDInventors: Jincheng Yu, Song Yao
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Patent number: 10732943Abstract: The disclosure provides a compilation method and system for heterogeneous computing platform, and a runtime method and system for supporting program execution on the heterogeneous computing platform. Inputting a trained neural network model to a Neural Network (NN) optimizing compiler to generate an NN assembly file corresponding to the neural network; inputting the NN assembly file to an NN assembler to generate an NN binary file corresponding to the neural network; compilation and assembling a neural network application developed by users in a high-level language using a host compiler toolchain to generate a corresponding host assembly file and a host binary file in sequence; and linking the NN binary file and the host binary file using a host linker to generate a single hybrid linking executable file. The technical solution of the present disclosure has the advantages such as good computing performance, strong scalability, strong compatibility and high flexibility.Type: GrantFiled: April 10, 2018Date of Patent: August 4, 2020Assignee: XILINX, INC.Inventors: Xiaoming Sun, Lingzhi Sui, Hong Luo, Yi Shan, Song Yao
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Patent number: 10664283Abstract: Computing system and controller thereof are disclosed for ensuring the correct logical relationship between multiple instructions during their parallel execution. The computing system comprises: a plurality of functional modules each performing a respective function in response to an instruction for the given functional module; and a controller for determining whether or not to send an instruction to a corresponding functional module according to dependency relationship between the plurality of instructions.Type: GrantFiled: June 12, 2017Date of Patent: May 26, 2020Assignee: BEIJING DEEPHI TECHNOLOGY CO., LTD.Inventors: Kaiyuan Guo, Song Yao
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Patent number: 10643124Abstract: Systems, apparatus and methods are provided for accelerating a complex neural network by fixed-point data quantization. An Artificial Neural Network (ANN) has branches and comprises convolutional layers CONV 1, CONV 2, . . . CONV n, fully connected layers FC 1, FC 2, . . . , FC m, and concatenation layers CONCAT1, CONCAT2, . . . , CONCAT L. n, m and L are positive integers. The ANN may be optimized by a method comprising: converting output of each of the CONV, FC and CONCAT layers into fixed-point numbers, identifying at least one sub-network from the ANN and for each sub-network, modifying the fixed-point range of each output of the previous-level layers of the CONCAT layer on the basis of the fixed-point range of the CONCAT layer. The sub-network has a CONCAT layer as its output. The CONCAT layer receives at least two outputs of previous-level layers as inputs and concatenates the inputs into one output.Type: GrantFiled: August 31, 2016Date of Patent: May 5, 2020Assignee: BEIJING DEEPHI INTELLIGENT TECHNOLOGY CO., LTD.Inventors: Jincheng Yu, Song Yao
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Patent number: 10621486Abstract: The present invention relates to artificial neural network, for example, convolutional neural network. In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes an overall design process of compressing, fix-point quantization and compiling the neural network model.Type: GrantFiled: August 22, 2016Date of Patent: April 14, 2020Assignee: BEIJING DEEPHI INTELLIGENT TECHNOLOGY CO., LTD.Inventor: Song Yao
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Publication number: 20180293057Abstract: The disclosure provides a compilation method and system for heterogeneous computing platform, and a runtime method and system for supporting program execution on the heterogeneous computing platform. Inputting a trained neural network model to a Neural Network (NN) optimizing compiler to generate an NN assembly file corresponding to the neural network; inputting the NN assembly file to an NN assembler to generate an NN binary file corresponding to the neural network; compilation and assembling a neural network application developed by users in a high-level language using a host compiler toolchain to generate a corresponding host assembly file and a host binary file in sequence; and linking the NN binary file and the host binary file using a host linker to generate a single hybrid linking executable file. The technical solution of the present disclosure has the advantages such as good computing performance, strong scalability, strong compatibility and high flexibility.Type: ApplicationFiled: April 10, 2018Publication date: October 11, 2018Inventors: Xiaoming SUN, Lingzhi SUI, Hong LUO, Yi SHAN, Song YAO
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Publication number: 20180186452Abstract: An unmanned aerial vehicle interactive apparatus based on a deep learning posture estimation is provided. The apparatus (10) comprises: a shooting unit (11) for shooting an object video; a key frame extraction unit (12) for extracting a key frame image relating to an object from the shot object video; a posture estimation unit (13) for recognizing an object posture with respect to the key frame image based on an image recognition algorithm of a deep convolutional neural network; and an unmanned aerial vehicle operation control unit (14) for converting the recognized object posture into a control instruction so as to control the operation of the unmanned aerial vehicle. A human posture estimation is used to control the unmanned aerial vehicle conveniently. Moreover, in the key frame extraction and posture estimation, faster and more accurate results can be obtained by using the deep convolution neural network algorithm.Type: ApplicationFiled: January 3, 2018Publication date: July 5, 2018Inventors: Lu Tian, Yi Shan, Song Yao
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Publication number: 20180046894Abstract: The present invention relates to artificial neural network, for example, convolutional neural network. In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes an overall design process of compressing, fix-point quantization and compiling the neural network model.Type: ApplicationFiled: August 22, 2016Publication date: February 15, 2018Inventor: Song YAO
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Publication number: 20180046913Abstract: The present invention relates to artificial neural network (ANN), for example, convolutional neural network (CNN). In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes a CPU+FPGA heterogeneous architecture to accelerate ANNs.Type: ApplicationFiled: August 26, 2016Publication date: February 15, 2018Inventors: Jincheng YU, Song YAO
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Publication number: 20180046903Abstract: The present invention relates to artificial neural network, for example, convolutional neural network. In particular, the present invention relates to how to implement and optimize a convolutional neural network based on an embedded FPGA. Specifically, it proposes a CPU+FPGA heterogeneous architecture to accelerate ANNs.Type: ApplicationFiled: August 22, 2016Publication date: February 15, 2018Inventors: Song YAO, Kaiyuan GUO
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Publication number: 20180046896Abstract: The present invention relates to artificial neural network, for example, convolutional neural network. In particular, the present invention relates to how to accelerate a complex neural network by fixed-point data quantization.Type: ApplicationFiled: August 31, 2016Publication date: February 15, 2018Inventors: Jincheng YU, Song YAO
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Publication number: 20180011710Abstract: Computing system and controller thereof are disclosed for ensuring the correct logical relationship between multiple instructions during their parallel execution. The computing system comprises: a plurality of functional modules each performing a respective function in response to an instruction for the given functional module; and a controller for determining whether or not to send an instruction to a corresponding functional module according to dependency relationship between the plurality of instructions.Type: ApplicationFiled: June 12, 2017Publication date: January 11, 2018Inventors: Kaiyuan Guo, Song Yao
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Patent number: 8359637Abstract: A system for sharing a device between two independent software platforms and for access control of a network device across the two independent software platforms is provided. The system has a first computing device operating on a first software platform for authenticating at least a first user and accessing a first user's access list having at least one address of a second user. The system also has a second computing device operable with the same first user and a second different software platform. A destination across the first and the second software platforms is mapped to selectively control the device by the second user from the first user's access list with the second user operating on the second computing device.Type: GrantFiled: October 16, 2009Date of Patent: January 22, 2013Assignee: Seedonk, Inc.Inventors: Herman Yau, Song Yao, Bin U
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Patent number: 8255467Abstract: A system and method for providing device management and sharing in an Instant Messenger system is provided. An instant messenger server and an enhanced instant messenger module are operatively coupled together. The enhanced instant messenger module has an instant messenger process and a networked device process, the instant messenger process being operable to provide instant messaging functions and services to a user and the networked device process being operable to provide data from networked devices to the instant messenger server.Type: GrantFiled: December 13, 2008Date of Patent: August 28, 2012Inventors: Herman Yau, Song Yao
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Publication number: 20110093923Abstract: A system for sharing a device between two independent software platforms and for access control of a network device across the two independent software platforms is provided. The system has a first computing device operating on a first software platform for authenticating at least a first user and accessing a first user's access list having at least one address of a second user. The system also has a second computing device operable with the same first user and a second different software platform. A destination across the first and the second software platforms is mapped to selectively control the device by the second user from the first user's access list with the second user operating on the second computing device.Type: ApplicationFiled: October 16, 2009Publication date: April 21, 2011Inventors: Herman Yau, Song Yao, Bin U