Patents by Inventor Song Zhao
Song Zhao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20150087127Abstract: An integrated circuit contains a transistor with a stress enhancement region on the source side only. In a DeMOS transistor, forming the stress enhancement region on the source side only and not forming a stress enhancement region in the drain extension increases the resistance of the drain extension region enabling formation of a DeMOS transistor with reduced area. In a MOS transistor, by forming the stress enhancement region on the source side only and eliminating the stress enhancement region from the drain side, transistor leakage is reduced and CHC reliability improved.Type: ApplicationFiled: December 3, 2014Publication date: March 26, 2015Inventors: Samuel Zafar Nawaz, Shaofeng YU, Jeffrey E. BRIGHTON, Song ZHAO
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Patent number: 8940598Abstract: A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.Type: GrantFiled: November 3, 2011Date of Patent: January 27, 2015Assignee: Texas Instruments IncorporatedInventors: Greg Charles Baldwin, Kamel Benaissa, Sarah Liu, Song Zhao
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Patent number: 8928047Abstract: An integrated circuit contains a transistor with a stress enhancement region on the source side only. In a DeMOS transistor, forming the stress enhancement region on the source side only and not forming a stress enhancement region in the drain extension increases the resistance of the drain extension region enabling formation of a DeMOS transistor with reduced area. In a MOS transistor, by forming the stress enhancement region on the source side only and eliminating the stress enhancement region from the drain side, transistor leakage is reduced and CHC reliability improved.Type: GrantFiled: November 3, 2011Date of Patent: January 6, 2015Assignee: Texas Instruments IncorporatedInventors: Samuel Zafar Nawaz, Shaofeng Yu, Jeffrey E. Brighton, Song Zhao
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Publication number: 20140171442Abstract: Disclosed are alicyclic[c]benzopyrone derivatives and use thereof. The alicyclic[c]benzopyrone derivatives are compounds represented by formula I or their salts. The present compounds not only significantly improve high activity induced by MK-801, but also effectively improve clambering symptom induced by Apomorphine and do not cause EPS within effective dose. These in vitro targets and in vivo pharmacological models are closely related to diseases of the nervous system caused by dopamine dysfunction, especially schizophrenia. Therefore the present compounds can be used for the treatment of central nervous system diseases, especially schizophrenia. ED50 is lower and effect is stronger in two animal models i.e. high activity induced by MK-801 and clambering symptom induced by Apomorphine, while ED50 is higher and therapeutic index is greater in animal models of catalepsy.Type: ApplicationFiled: July 31, 2012Publication date: June 19, 2014Inventors: Guisen Zhang, Yin Chen, Xiangqing Xu, Xin Liu, Song Zhao, Bifeng Liu, Miquan Yu, Yinli Qiu
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Patent number: 8748256Abstract: A method for forming an integrated circuit (IC) including a silicide block poly resistor (SIBLK poly resistor) includes forming a dielectric isolation region in a top semiconductor surface of a substrate. A polysilicon layer is formed including patterned resistor polysilicon on the dielectric isolation region and gate polysilicon on the top semiconductor surface. Implanting is performed using a first shared metal-oxide-semiconductor (MOS)/resistor polysilicon implant level for simultaneously implanting the patterned resistor polysilicon and gate polysilicon of a MOS transistor with at least a first dopant. Implanting is then performed using a second shared MOS/resistor polysilicon implant level for simultaneously implanting the patterned resistor polysilicon, gate polysilicon and source and drain regions of the MOS transistor with at least a second dopant. A metal silicide is formed on a first and second portion of a top surface of the patterned resistor polysilicon to form the SIBLK poly resistor.Type: GrantFiled: February 6, 2012Date of Patent: June 10, 2014Assignee: Texas Instruments IncorporatedInventors: Song Zhao, Gregory Charles Baldwin, Shashank S. Ekbote, Youn Sung Choi
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Patent number: 8717405Abstract: A method and a device for generating 3-dimensional (3D) panoramic video streams, a videoconference method, and a videoconference device are disclosed. The method includes: obtaining depth information of at least two video images; obtaining image data in multiple depth positions from a corresponding video image according to the depth information of each video image; stitching data of the video images according to the obtained image data in multiple depth positions, and generating 3D panoramic video streams. The technical solution of the present invention provides users with high-resolution 3D panoramic seamless telepresence conference video images based on different display modes of different display devices.Type: GrantFiled: June 29, 2011Date of Patent: May 6, 2014Assignee: Huawei Device Co., Ltd.Inventors: Kai Li, Yuan Liu, Jing Wang, Honghong Su, Song Zhao
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Publication number: 20140113911Abstract: The present invention relates to the field of pharmaceutical chemistry, and in particular, to a benzopyrone derivative and a use thereof. The benzopyrone derivative is compound having a structure of formula (I) or a pharmaceutically acceptable salt thereof. It has been found by experiments that, this type of compounds is useful in prevention or treatment of neuropsychical diseases.Type: ApplicationFiled: April 6, 2012Publication date: April 24, 2014Applicant: NHWA PHARMA CORPORATIONInventors: Guisen Zhang, Yin Chen, Xiangqing Xu, Bifeng Liu, Xin Liu, Song Zhao, Shicheng Liu, Minquan Yu, Heng Zhang, Xinghua Liu
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Publication number: 20140024656Abstract: The present invention belongs to the medicinal chemistry field, and specifically discloses a [1,3,4]oxadiazole derivative with the structure of general formula (I) and pharmaceutically acceptable salt thereof. The compound can be used to prepare a medicine for preventing or treating a disease of the central nervous system.Type: ApplicationFiled: April 1, 2012Publication date: January 23, 2014Applicant: HUAZHONG UNIVERSITY OF SCIENCE & TECHNOLOGY NHWA PHARMA CORPORATIONInventors: Guisen Zhang, Yin Chen, Xiangqing Xu, Bifeng Liu, Xiaojun Feng, Song Zhao, Shicheng Liu, Minquan Yu, Yu Lan, Yinli Qiu
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Patent number: 8558869Abstract: Embodiments of the present invention provide an image processing method and device, relating to the field of communications technology. The method includes: receiving at least two channels of images transmitted from a remote conference site; if there is a blind area in splicing of the at least two channels of images, comparing the width of the blind area with the sum of the widths of a left border and a right border of a display apparatus in a local conference site; processing the at least two channels of images separately according to a comparison result; outputting the at least two channels of processed images separately to the display apparatuses in the local conference site for displaying. In the embodiments of the present invention, the optimal image display effect may be achieved and the user experience in a telepresence video conference may be improved.Type: GrantFiled: March 12, 2012Date of Patent: October 15, 2013Assignee: Huawei Device Co., Ltd.Inventors: Jiaoli Wu, Yang Zhao, Jing Wang, Kai Li, Yuan Liu, Song Zhao
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Publication number: 20130200466Abstract: A method for forming an integrated circuit (IC) including a silicide block poly resistor (SIBLK poly resistor) includes forming a dielectric isolation region in a top semiconductor surface of a substrate. A polysilicon layer is formed including patterned resistor polysilicon on the dielectric isolation region and gate polysilicon on the top semiconductor surface. Implanting is performed using a first shared metal-oxide-semiconductor (MOS)/resistor polysilicon implant level for simultaneously implanting the patterned resistor polysilicon and gate polysilicon of a MOS transistor with at least a first dopant. Implanting is then performed using a second shared MOS/resistor polysilicon implant level for simultaneously implanting the patterned resistor polysilicon, gate polysilicon and source and drain regions of the MOS transistor with at least a second dopant. A metal silicide is formed on a first and second portion of a top surface of the patterned resistor polysilicon to form the SIBLK poly resistor.Type: ApplicationFiled: February 6, 2012Publication date: August 8, 2013Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: SONG ZHAO, GREGORY CHARLES BALDWIN, SHASHANK S. EKBOTE, YOUN SUNG CHOI
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Patent number: 8503823Abstract: An image conversion method, a conversion device, and a display system are provided in the embodiments of the present invention. The image conversion method includes: performing word area detection on an image to acquire a detected word area; and performing conversion processing on the image according to the word area to acquire a converted image that has an aspect ratio different from that of an unconverted image. The conversion device includes: a detection unit, configured to perform word area detection on an image to acquire a detected word area; and a conversion unit, configured to perform conversion processing on the image according to the word area to acquire a converted image that has an aspect ratio different from that of an unconverted image. In this way, an important content area of the image may be retained and clearly displayed.Type: GrantFiled: October 28, 2011Date of Patent: August 6, 2013Assignee: Huawei Device Co., Ltd.Inventors: Yuan Liu, Song Zhao, Jing Wang
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Patent number: 8355062Abstract: A method for processing an image includes: obtaining depth values of an image including a target region and a non-target region; obtaining a scaling ratio of the target region; obtaining a scaling ratio of the non-target region according to the depth values of the image and the scaling ratio of the target region; scaling respectively the target region and the non-target region according to the scaling ratio of the target region and the scaling ratio of the non-target region, and obtaining a scaled image.Type: GrantFiled: July 22, 2011Date of Patent: January 15, 2013Assignee: Huawei Device Co., Ltd.Inventors: Song Zhao, Jing Wang, Yuan Liu, Kai Li
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Publication number: 20120169833Abstract: Embodiments of the present invention provide an image processing method and device, relating to the field of communications technology. The method includes: receiving at least two channels of images transmitted from a remote conference site; if there is a blind area in splicing of the at least two channels of images, comparing the width of the blind area with the sum of the widths of a left border and a right border of a display apparatus in a local conference site; processing the at least two channels of images separately according to a comparison result; outputting the at least two channels of processed images separately to the display apparatuses in the local conference site for displaying. In the embodiments of the present invention, the optimal image display effect may be achieved and the user experience in a telepresence video conference may be improved.Type: ApplicationFiled: March 12, 2012Publication date: July 5, 2012Inventors: Jiaoli WU, Yang Zhao, Jing Wang, Kai Li, Yuan Liu, Song Zhao
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Publication number: 20120169829Abstract: A method and an apparatus for processing video image data are disclosed in the embodiments of the present invention. The method includes: obtaining multiple channels of correlative video image data and correlative information; combining the multiple channels of correlative video image data into a single channel of panoramic video image data by using the correlative information; and after recombining the panoramic video image data into multiple channels of video image data satisfying a display requirement of multiple display devices, respectively sending each channel of recombined video image data to each display device for display. Therefore, an overlapping phenomenon existing in images shot by a camera may be allowed, so that requirements on a location where a camera is placed and a distance between a user and a camera set are lowered.Type: ApplicationFiled: March 9, 2012Publication date: July 5, 2012Applicant: Huawei Device Co., Ltd.Inventors: Xiaoxia Wei, Song Zhao, Jing Wang, Yuan Liu, Kai Li
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Publication number: 20120146054Abstract: An integrated circuit contains a transistor with a stress enhancement region on the source side only. In a DeMOS transistor, forming the stress enhancement region on the source side only and not forming a stress enhancement region in the drain extension increases the resistance of the drain extension region enabling formation of a DeMOS transistor with reduced area. In a MOS transistor, by forming the stress enhancement region on the source side only and eliminating the stress enhancement region from the drain side, transistor leakage is reduced and CHC reliability improved.Type: ApplicationFiled: November 3, 2011Publication date: June 14, 2012Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Samuel Zafar Nawaz, Shaofeng Yu, Jeffrey E. Brighton, Song Zhao
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Publication number: 20120108020Abstract: A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.Type: ApplicationFiled: November 3, 2011Publication date: May 3, 2012Applicant: TEXAS INSTRUMENTS INCORPORATEDInventors: Greg Charles BALDWIN, Kamel BENAISSA, Sarah LIU, Song Zhao
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Patent number: 8125035Abstract: Ultra high temperature (UHT) anneals above 1200 C for less than 100 milliseconds for PMOS transistors reduce end of range dislocations, but are incompatible with stress memorization technique (SMT) layers used to enhance NMOS on-state current. This invention reverses the conventional order of forming the NMOS first by forming PSD using carbon co-implants and UHT annealing them before implanting the NSD and depositing the SMT layer. End of range dislocation densities in the PSD space charge region below 100 cm?2 are achieved. Tensile stress in the PMOS from the SMT layer is significantly reduced. The PLDD may also be UHT annealed to reduce end of range dislocations close to the PMOS channel.Type: GrantFiled: January 29, 2010Date of Patent: February 28, 2012Assignee: Texas Instruments IncorporatedInventors: Mahalingam Nandakumar, Song Zhao, Amitabh Jain
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Publication number: 20120045147Abstract: An image conversion method, a conversion device, and a display system are provided in the embodiments of the present invention. The image conversion method includes: performing word area detection on an image to acquire a detected word area; and performing conversion processing on the image according to the word area to acquire a converted image that has an aspect ratio different from that of an unconverted image. The conversion device includes: a detection unit, configured to perform word area detection on an image to acquire a detected word area; and a conversion unit, configured to perform conversion processing on the image according to the word area to acquire a converted image that has an aspect ratio different from that of an unconverted image. In this way, an important content area of the image may be retained and clearly displayed.Type: ApplicationFiled: October 28, 2011Publication date: February 23, 2012Applicant: Huawei Device Co., Ltd.Inventors: Yuan Liu, Song Zhao, Jing Wang
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Patent number: 8101476Abstract: A method for forming a tensile SiN stress layer for stress memorization enhancement of NMOS transistors with a high Si—H/N—H bond ratio that does not degrade PMOS transistors. A CMOS integrated circuit is processed through a NMOS source and drain implant but not through NMOS source and drain anneal. A SiN dielectric layer is deposited such that an area ratio of a Si—H peak to a N—H peak in a FTIR spectrum is greater than 7 and a tensile stress of the SiN dielectric is greater than 150 MPa. The CMOS integrated circuit is annealed after deposition of the SiN dielectric layer and the SiN dielectric layer is removed from at least a part of the integrated circuit.Type: GrantFiled: August 14, 2009Date of Patent: January 24, 2012Assignee: Texas Instruments IncorporatedInventors: Kanan Garg, Haowen Bu, Mahalingam Nandakumar, Song Zhao
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Publication number: 20110316963Abstract: A method and a device for generating 3-dimensional (3D) panoramic video streams, a videoconference method, and a videoconference device are disclosed. The method includes: obtaining depth information of at least two video images; obtaining image data in multiple depth positions from a corresponding video image according to the depth information of each video image; stitching data of the video images according to the obtained image data in multiple depth positions, and generating 3D panoramic video streams. The technical solution of the present invention provides users with high-resolution 3D panoramic seamless telepresence conference video images based on different display modes of different display devices.Type: ApplicationFiled: June 29, 2011Publication date: December 29, 2011Applicant: HUAWEI DEVICE CO., LTD.Inventors: Kai LI, Yuan LIU, Jing WANG, Honghong SU, Song ZHAO