Patents by Inventor Songha Oh

Songha Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device and method of fabricating the same
    Patent number: 9607841
    Abstract: Provided is a semiconductor device and a method of fabricating the same. The method may include forming trenches in a substrate and lower gate patterns on the substrate between the trenches, forming sacrificial patterns filling the trenches, forming a porous insulating layer on the lower gate patterns to cover top surfaces of the sacrificial patterns, removing the sacrificial patterns through pores of the porous insulating layer to form air gaps surrounded by the trenches and the porous insulating layer, and forming a liner insulating layer on inner surfaces of the trenches through the pores of the porous insulating layer.
    Type: Grant
    Filed: October 9, 2014
    Date of Patent: March 28, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: HyoJoong Kim, Songha Oh, Changgoo Jung
  • Methods of manufacturing semiconductor devices including variable width floating gates
    Patent number: 9373513
    Abstract: A semiconductor device includes a substrate including an active region defined by a device isolation pattern and a floating gate on the active region. The floating gate includes an upper portion, a lower portion having a width greater than a width of the upper portion, and a step-difference portion between the upper portion and the lower portion. A dielectric pattern is on the floating gate, and a control gate is on the dielectric pattern. The lower portion of the floating gate has a height of about 4 nm or more.
    Type: Grant
    Filed: September 24, 2015
    Date of Patent: June 21, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: HyoJoong Kim, ByeongHoon Kim, In-Young Kim, Sang Bong Shin, Songha Oh
  • METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING VARIABLE WIDTH FLOATING GATES
    Publication number: 20160013062
    Abstract: A semiconductor device includes a substrate including an active region defined by a device isolation pattern and a floating gate on the active region. The floating gate includes an upper portion, a lower portion having a width greater than a width of the upper portion, and a step-difference portion between the upper portion and the lower portion. A dielectric pattern is on the floating gate, and a control gate is on the dielectric pattern. The lower portion of the floating gate has a height of about 4 nm or more.
    Type: Application
    Filed: September 24, 2015
    Publication date: January 14, 2016
    Inventors: HyoJoong Kim, ByeongHoon Kim, In-Young Kim, Sang Bong Shin, Songha Oh
  • Semiconductor devices including variable width floating gates
    Patent number: 9171854
    Abstract: A semiconductor device includes a substrate including an active region defined by a device isolation pattern and a floating gate on the active region. The floating gate includes an upper portion, a lower portion having a width greater than a width of the upper portion, and a step-difference portion between the upper portion and the lower portion. A dielectric pattern is on the floating gate, and a control gate is on the dielectric pattern. The lower portion of the floating gate has a height of about 4 nm or more.
    Type: Grant
    Filed: August 14, 2013
    Date of Patent: October 27, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: HyoJoong Kim, ByeongHoon Kim, In-Young Kim, Sang Bong Shin, Songha Oh
  • SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME
    Publication number: 20150108561
    Abstract: Provided is a semiconductor device and a method of fabricating the same. The method may include forming trenches in a substrate and lower gate patterns on the substrate between the trenches, forming sacrificial patterns filling the trenches, forming a porous insulating layer on the lower gate patterns to cover top surfaces of the sacrificial patterns, removing the sacrificial patterns through pores of the porous insulating layer to form air gaps surrounded by the trenches and the porous insulating layer, and forming a liner insulating layer on inner surfaces of the trenches through the pores of the porous insulating layer.
    Type: Application
    Filed: October 9, 2014
    Publication date: April 23, 2015
    Inventors: HyoJoong Kim, Songha Oh, Changgoo Jung
  • SEMICONDUCTOR DEVICES INCLUDING VARIABLE WIDTH FLOATING GATES, AND APPARATUS FOR PROCESSING SUBSTRATE
    Publication number: 20140138757
    Abstract: A semiconductor device includes a substrate including an active region defined by a device isolation pattern and a floating gate on the active region. The floating gate includes an upper portion, a lower portion having a width greater than a width of the upper portion, and a step-difference portion between the upper portion and the lower portion. A dielectric pattern is on the floating gate, and a control gate is on the dielectric pattern. The lower portion of the floating gate has a height of about 4 nm or more.
    Type: Application
    Filed: August 14, 2013
    Publication date: May 22, 2014
    Inventors: HyoJoong Kim, ByeongHoon Kim, In-young Kim, Sang Bong Shin, Songha Oh