Abstract: Disclosed is a method of fabricating a semiconductor device including forming an insulating film on a silicon substrate; forming a contact hole in the insulating film; depositing a titanium film to be in contact with the silicon substrate in the contact hole; and causing a heat reaction between the titanium film and the silicon substrate such that the titanium film is subjected to silicide reaction with the thickness 4 nm to 48 nm or, more preferably, with the thickness of 8 nm to 34 nm. In the instance where the contact hole is filled with doped polycrystal silicon material, the titanium film is deposited to be in contact with the polycrystal silicon in the contact hole. The silicon substrate/silicon body may have at least a MISFET formed thereon in which case the contact hole is formed to expose an active region of the MISFET, as one example.

Abstract: The present invention proposes a non-volatile semiconductor storage, comprising a plurality of main bit lines, a plurality of sub bit lines connected to the main bit lines, and a plurality of memory cell arrays, each including a plurality of non-volatile semiconductor memory cells disposed like an array. Each of those memory cells has a source terminal, a drain terminal, and a control gate, and each source-drain path is connected to a sub bit line. Between a main bit line and a sub bit line connected to the main bit line is disposed the source-drain path of a first transistor, and the source-drain path of a second transistor is connected to the sub bit line.

Abstract: The present invention proposes a non-volatile semiconductor storage, comprising a plurality of main bit lines, a plurality of sub bit lines connected to the main bit lines, and a plurality of memory cell arrays, each including a plurality of non-volatile semiconductor memory cells disposed like an array. Each of those memory cells has a source terminal, a drain terminal, and a control gate, and each source-drain path is connected to a sub bit line. Between a main bit line and a sub bit line connected to the main bit line is disposed the source-drain path of a first transistor, and the source-drain path of a second transistor is connected to the sub bit line.

Abstract: The present invention proposes a non-volatile semiconductor storage, comprising a plurality of main bit lines, a plurality of sub bit lines connected to the main bit lines, and a plurality of memory cell arrays, each including a plurality of non-volatile semiconductor memory cells disposed like an array. Each of those memory cells has a source terminal, a drain terminal, and a control gate, and each source-drain path is connected to a sub bit line. Between a main bit line and a sub bit line connected to the main bit line is disposed the source-drain path of a first transistor, and the source-drain path of a second transistor is connected to the sub bit line.

Abstract: A semiconductor device comprises a silicon substrate, an electrical wiring metal, an insulating film formed on the silicon substrate, a plurality of contact holes formed in the insulating film for connecting the silicon substrate and the electrical wiring metal to each other, and a titanium silicide film formed in the contact holes. The thickness of the titanium silicide film is 10 nm to 120 nm, or preferably, 20 nm to 84 nm. Semiconductor regions and the electrical wiring metal are connected to each other through the titanium silicide film.

Abstract: A semiconductor device comprises a silicon substrate, an electrical wiring metal, an insulating film formed on the silicon substrate, a plurality of contact holes formed in the insulating film for connecting the silicon substrate and the electrical wiring metal to each other, and a titanium silicide film formed in the contact holes. The thickness of the titanium silicide film is 10 nm to 120 nm or, preferably, 20 nm to 84 nm. Semiconductor regions and the electrical wiring metal are connected to each other through the titanium silicide film.

Abstract: The present invention proposes a non-volatile semiconductor storage, comprising a plurality of main bit lines, a plurality of sub bit lines connected to the main bit lines, and a plurality of memory cell arrays, each including a plurality of non-volatile semiconductor memory cells disposed like an array. Each of those memory cells has a source terminal, a drain terminal, and a control gate, and each source-drain path is connected to a sub bit line. Between a main bit line and a sub bit line connected to the main bit line is disposed the source-drain path of a first transistor, and the source-drain path of a second transistor is connected to the sub bit line.

Abstract: A semiconductor device comprises a silicon substrate, an electrical wiring metal, an insulating film formed on the silicon substrate, a plurality of contact holes formed in the insulating film for connecting the silicon substrate and the electrical wiring metal to each other, and a titanium silicide film formed in the contact holes. The thickness of the titanium silicide film is 10 nm to 120 nm or, preferably, 20 nm to 84 nm. Semiconductor regions and the electrical wiring metal are connected to each other through the titanium silicide film.