Patents by Inventor Sonoko Aristud

Sonoko Aristud has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11281245
    Abstract: A radio frequency (“RF”) power device includes a RF power transistor, and a bias circuit coupled between a reference voltage input and an input terminal of the RF power transistor. The bias circuit includes an impedance control circuit that is configured to vary an impedance of the bias circuit at the input terminal of the RF power transistor responsive to a RF input signal provided to the input terminal, and/or a current control circuit that is configured to control a bias current provided to the input terminal of the RF power transistor responsive to variations in operating characteristics of the RF power transistor. Related RF power amplifiers and device packages are also discussed.
    Type: Grant
    Filed: January 27, 2021
    Date of Patent: March 22, 2022
    Assignee: WOLFSPEED, INC.
    Inventors: Christophe Joly, Sonoko Aristud
  • Patent number: 11201591
    Abstract: In an asymmetric Doherty amplifier circuit, one or more shunt reactive components are added to at least one side of an impedance inverter connecting the amplifier outputs, to reduce a capacitance imbalance between the two amplifiers caused by their different parasitic capacitances. This enables the (adjusted) parasitic capacitances to be incorporated into a quarter-wavelength transmission line, having a 90-degree phase shift, for the impedance inverter. In one embodiment, a shunt inductance is connected between the impedance inverter, on the side of the larger amplifier, and RF signal ground. The inductance is sized to resonate away substantially the excess parasitic capacitance of the larger amplifier. In another embodiment, a shunt capacitor is connected on the side of the smaller amplifier, thus raising its total capacitance to substantially equal the parasitic capacitance of the larger amplifier.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: December 14, 2021
    Assignee: Cree, Inc.
    Inventors: Haedong Jang, Sonoko Aristud, Marvin Marbell, Madhu Chidurala
  • Patent number: 11114988
    Abstract: In a Doherty amplifier, outputs of first (main) and second (peak) transistors are connected by a combined impedance inverter and harmonic termination circuit. The harmonic termination circuit incorporates a predetermined part of the impedance inverter, and provides a harmonic load impedance at a targeted harmonic frequency (e.g., the second harmonic). Control of the amplitude and phase of the harmonic load impedance facilitates shaping of the drain current and voltage waveforms to maximize gain and efficiency, while maintaining a good load modulation at a fundamental frequency. Particularly for Group III nitride semiconductors, such as GaN, both harmonic control and output impedance matching circuits may be eliminated from the outputs of each transistor. The combined impedance inverter and harmonic termination circuit reduces the amplifier circuit footprint, for high integration and low power consumption.
    Type: Grant
    Filed: May 24, 2019
    Date of Patent: September 7, 2021
    Assignee: Cree, Inc.
    Inventors: Jangheon Kim, Sonoko Aristud, Michael E. Watts, Mario Bokatius
  • Publication number: 20200373892
    Abstract: In a Doherty amplifier, outputs of first (main) and second (peak) transistors are connected by a combined impedance inverter and harmonic termination circuit. The harmonic termination circuit incorporates a predetermined part of the impedance inverter, and provides a harmonic load impedance at a targeted harmonic frequency (e.g., the second harmonic). Control of the amplitude and phase of the harmonic load impedance facilitates shaping of the drain current and voltage waveforms to maximize gain and efficiency, while maintaining a good load modulation at a fundamental frequency. Particularly for Group III nitride semiconductors, such as GaN, both harmonic control and output impedance matching circuits may be eliminated from the outputs of each transistor. The combined impedance inverter and harmonic termination circuit reduces the amplifier circuit footprint, for high integration and low power consumption.
    Type: Application
    Filed: May 24, 2019
    Publication date: November 26, 2020
    Inventors: Jangheon Kim, Sonoko Aristud, Michael E. Watts, Mario Bokatius
  • Publication number: 20200304074
    Abstract: In an asymmetric Doherty amplifier circuit, one or more shunt reactive components are added to at least one side of an impedance inverter connecting the amplifier outputs, to reduce a capacitance imbalance between the two amplifiers caused by their different parasitic capacitances. This enables the (adjusted) parasitic capacitances to be incorporated into a quarter-wavelength transmission line, having a 90-degree phase shift, for the impedance inverter. In one embodiment, a shunt inductance is connected between the impedance inverter, on the side of the larger amplifier, and RF signal ground. The inductance is sized to resonate away substantially the excess parasitic capacitance of the larger amplifier. In another embodiment, a shunt capacitor is connected on the side of the smaller amplifier, thus raising its total capacitance to substantially equal the parasitic capacitance of the larger amplifier.
    Type: Application
    Filed: March 20, 2019
    Publication date: September 24, 2020
    Inventors: Haedong Jang, Sonoko Aristud, Marvin Marbell, Madhu Chidurala