Patents by Inventor Soo Gil Kim

Soo Gil Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250253434
    Abstract: A battery pack includes: a battery pack in which a plurality of battery modules are arranged; an upper heat sink covering the upper surface of the battery pack and having a plurality of upper cooling flow passages through which a cooling fluid may flow to cool the battery modules; and a lower heat sink covering the lower surface of the battery pack and having a plurality of lower cooling flow passages through which a cooling fluid may flow to cool the battery modules.
    Type: Application
    Filed: March 21, 2025
    Publication date: August 7, 2025
    Applicant: INZICONTROLS CO., LTD.
    Inventors: Jung Min KIM, Soo Gil KIM, Hyoung Min CHOI, Seung Yong YOO, Min Joo KANG
  • Publication number: 20250125437
    Abstract: A battery module according to an embodiment of the present invention may include: a battery cell having formed thereon cell tabs; a heat sink arranged on one side of the battery cell to discharge heat generated from the battery cell to the outside; bus bars connected with the cell tabs; a bus bar frame which supports the bus bars; a cooling plate arranged apart from the bus bar frame and connected to the heat sink to enable heat transfer; and a phase change member which is arranged between the cooling plate and the bus bars to transfer, to the cooling plate, heat generated at the connection sites between the bus bars and the cell tabs and which includes a phase change material that changes phase by absorbing the heat generated at the connection sites between the bus bars and the cell tabs.
    Type: Application
    Filed: December 20, 2024
    Publication date: April 17, 2025
    Applicant: INZICONTROLS CO., LTD.
    Inventors: Jung Min KIM, Soo Gil Kim, Hyoung Min Choi, Seung Yong Yoo
  • Patent number: 12260909
    Abstract: Operating a selector device that controls access of a signal to a memory element may comprise applying a main operating voltage pulse and a refresh voltage pulse to the selector device. The refresh voltage pulse and main operating voltage pulse have opposite polarities. A magnitude of the main operating voltage pulse is greater than or equal to a threshold voltage for turning on the selector device, and a maximum magnitude of the refresh voltage pulse is less than the threshold voltage. The refresh voltage pulse reduces a difference between the threshold voltage and a turn-off voltage of the selector device, and may be applied immediately before or immediately after the main operating voltage pulse. An electronic circuit may include the selector device and a driving circuit for apply the pulses. A nonvolatile memory may include the driving circuit and a plurality of nonvolatile memory elements each including a selector device.
    Type: Grant
    Filed: March 22, 2023
    Date of Patent: March 25, 2025
    Assignees: SK hynix Inc., FOUNDATION FOR RESEARCH AND BUSINESS, SEOUL NATIONAL UNIVERSITY OF SCIENCE AND TECHNOLOGY, INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY ERICA CAMPUS
    Inventors: Tae Jung Ha, Soo Gil Kim, Jeong Hwan Song, Byung Joon Choi, Ha Young Lee
  • Publication number: 20240334849
    Abstract: A semiconductor device may include: a first conductive line; a second conductive line disposed over the first conductive line and spaced apart from the first conductive line; a memory cell disposed between the first conductive line and the second conductive line and including a memory layer; and one or more shield layers disposed at least one of at a first location over the memory layer or a second location under the memory layer, the one or more shield layers including an MXene material.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 3, 2024
    Inventors: Jong Min YUN, Soo Gil KIM, Soo Man SEO
  • Publication number: 20240172569
    Abstract: A semiconductor device may include: a first conductive line extending in a first direction; a second conductive line disposed over the first conductive line to be spaced apart from the first conductive line and extending in a second direction different from the first direction; and a selector layer disposed between the first conductive line and the second conductive line and extending in a direction crossing at least one of the first direction or the second direction, wherein the selector layer includes a trench formed on a surface of the selector layer and extending in the direction crossing at least one of the first direction or the second direction.
    Type: Application
    Filed: May 5, 2023
    Publication date: May 23, 2024
    Inventors: Jong Min YUN, Dae Eun KWON, Soo Gil KIM, Soo Man SEO, Tae Jung HA
  • Patent number: 11986325
    Abstract: Disclosed are treatment information display device and method for displaying treatment history on an image of teeth in an accumulated manner. The treatment information display method enables a user to recognize at once a past treatment history, a current treatment status, and a future treatment plan by displaying, on the image of teeth, treatment information for the past, present, and future. In addition, the treatment information display method can provide the user with pieces of treatment information displayed on different images of teeth, by displaying, in an accumulated manner, the pieces of treatment information displayed on a plurality of teeth images.
    Type: Grant
    Filed: June 10, 2020
    Date of Patent: May 21, 2024
    Assignee: Osstemimplant Co., Ltd.
    Inventors: Kyoo Ok Choi, Soo Gil Kim
  • Patent number: 11830549
    Abstract: Disclosed are a method of operating a selector device, a method of operating a nonvolatile memory apparatus to which the selector device is applied, an electronic circuit device including the selector device, and a nonvolatile memory apparatus. The method of operating the selector device controls access to a memory element, and includes providing the selector device including a switching layer and first and second electrodes disposed on both surfaces of the switching layer, which includes an insulator and a metal element, and applying a multi-step voltage pulse to the switching layer via the first and second electrodes to adjust a threshold voltage of the selector device, the multi-step voltage pulse including a threshold voltage control pulse and an operating voltage pulse. The operating voltage pulse has a magnitude for turning on the selector device, and the threshold voltage control pulse has a lower magnitude lower than the operating voltage pulse.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: November 28, 2023
    Assignees: SK hynix Inc., Industry-University Cooperation Foundation Hanyang University ERICA Campus
    Inventors: Tae Jung Ha, Soo Gil Kim, Jeong Hwan Song, Tae Joo Park, Tae Jun Seok, Hye Rim Kim, Hyun Seung Choi
  • Publication number: 20230326523
    Abstract: Operating a selector device that controls access of a signal to a memory element may comprise applying a main operating voltage pulse and a refresh voltage pulse to the selector device. The refresh voltage pulse and main operating voltage pulse have opposite polarities. A magnitude of the main operating voltage pulse is greater than or equal to a threshold voltage for turning on the selector device, and a maximum magnitude of the refresh voltage pulse is less than the threshold voltage. The refresh voltage pulse reduces a difference between the threshold voltage and a turn-off voltage of the selector device, and may be applied immediately before or immediately after the main operating voltage pulse. An electronic circuit may include the selector device and a driving circuit for apply the pulses. A nonvolatile memory may include the driving circuit and a plurality of nonvolatile memory elements each including a selector device.
    Type: Application
    Filed: March 22, 2023
    Publication date: October 12, 2023
    Inventors: Tae Jung HA, Soo Gil KIM, Jeong Hwan SONG, Byung Joon CHOI, Ha Young LEE
  • Patent number: 11770980
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n?1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n?1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n?1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.
    Type: Grant
    Filed: August 12, 2020
    Date of Patent: September 26, 2023
    Assignee: SK HYNIX INC.
    Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Min Seok Moon, Jong Koo Lim, Sung Woong Chung
  • Patent number: 11730062
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure including a free layer, a pinned layer, and a tunnel barrier layer, the free layer having a variable magnetization direction, the pinned layer having a fixed magnetization direction, the tunnel barrier layer being interposed between the free layer and the pinned layer; and a thermal stability enhanced layer (TSEL) including a homogeneous material having an Fe—O bond.
    Type: Grant
    Filed: September 25, 2020
    Date of Patent: August 15, 2023
    Assignees: SK hynix Inc., Kioxia Corporation
    Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Soo Man Seo, Jong Koo Lim, Taiga Isoda
  • Publication number: 20230005537
    Abstract: Disclosed are a method of operating a selector device, a method of operating a nonvolatile memory apparatus to which the selector device is applied, an electronic circuit device including the selector device, and a nonvolatile memory apparatus. The method of operating the selector device controls access to a memory element, and includes providing the selector device including a switching layer and first and second electrodes disposed on both surfaces of the switching layer, which includes an insulator and a metal element, and applying a multi-step voltage pulse to the switching layer via the first and second electrodes to adjust a threshold voltage of the selector device, the multi-step voltage pulse including a threshold voltage control pulse and an operating voltage pulse. The operating voltage pulse has a magnitude for turning on the selector device, and the threshold voltage control pulse has a lower magnitude lower than the operating voltage pulse.
    Type: Application
    Filed: June 30, 2022
    Publication date: January 5, 2023
    Inventors: Tae Jung HA, Soo Gil KIM, Jeong Hwan SONG, Tae Joo PARK, Tae Jun SEOK, Hye Rim KIM, Hyun Seung CHOI
  • Publication number: 20220240868
    Abstract: Disclosed are treatment information display device and method for displaying treatment history on an image of teeth in an accumulated manner. The treatment information display method enables a user to recognize at once a past treatment history, a current treatment status, and a future treatment plan by displaying, on the image of teeth, treatment information for the past, present, and future. In addition, the treatment information display method can provide the user with pieces of treatment information displayed on different images of teeth, by displaying, in an accumulated manner, the pieces of treatment information displayed on a plurality of teeth images.
    Type: Application
    Filed: June 10, 2020
    Publication date: August 4, 2022
    Inventors: Kyoo Ok Choi, Soo Gil Kim
  • Patent number: 11223012
    Abstract: A variable resistance semiconductor device includes a lower conductive wiring; a bottom electrode over the lower conductive wiring; a selection element pattern over the bottom electrode; a first intermediate electrode over the selection element pattern; a second intermediate electrode over the first intermediate electrode; a variable resistance element pattern over the second intermediate electrode; a top electrode over the variable resistance element pattern; and an upper conductive wiring over the top electrode. The first intermediate electrode includes a first material. The second intermediate electrode includes a second material which has a better oxidation resistance and a higher work function than the first material.
    Type: Grant
    Filed: September 20, 2019
    Date of Patent: January 11, 2022
    Assignee: SK hynix Inc.
    Inventors: Woo-Young Park, Young-Seok Ko, Soo-Gil Kim
  • Patent number: 11183635
    Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.
    Type: Grant
    Filed: September 2, 2020
    Date of Patent: November 23, 2021
    Assignee: SK Hynix Inc.
    Inventors: Joo Young Moon, Young Seok Ko, Soo Gil Kim
  • Patent number: 11043533
    Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: June 22, 2021
    Assignee: SK hynix Inc.
    Inventors: Beom Yong Kim, Soo Gil Kim
  • Publication number: 20210184101
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n?1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n?1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n?1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.
    Type: Application
    Filed: August 12, 2020
    Publication date: June 17, 2021
    Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Min Seok Moon, Jong Koo Lim, Sung Woong Chung
  • Publication number: 20210184102
    Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure including a free layer, a pinned layer, and a tunnel barrier layer, the free layer having a variable magnetization direction, the pinned layer having a fixed magnetization direction, the tunnel barrier layer being interposed between the free layer and the pinned layer; and a thermal stability enhanced layer (TSEL) including a homogeneous material having an Fe—O bond.
    Type: Application
    Filed: September 25, 2020
    Publication date: June 17, 2021
    Inventors: Tae Young LEE, Guk Cheon KIM, Soo Gil KIM, Soo Man SEO, Jong Koo LIM, Taiga ISODA
  • Publication number: 20200403155
    Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.
    Type: Application
    Filed: September 2, 2020
    Publication date: December 24, 2020
    Inventors: Joo Young MOON, Young Seok KO, Soo Gil KIM
  • Patent number: 10797239
    Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.
    Type: Grant
    Filed: May 15, 2019
    Date of Patent: October 6, 2020
    Assignee: SK hynix Inc.
    Inventors: Joo Young Moon, Young Seok Ko, Soo Gil Kim
  • Publication number: 20200194667
    Abstract: A variable resistance semiconductor device includes a lower conductive wiring; a bottom electrode over the lower conductive wiring; a selection element pattern over the bottom electrode; a first intermediate electrode over the selection element pattern; a second intermediate electrode over the first intermediate electrode; a variable resistance element pattern over the second intermediate electrode; a top electrode over the variable resistance element pattern; and an upper conductive wiring over the top electrode. The first intermediate electrode includes a first material. The second intermediate electrode includes a second material which has a better oxidation resistance and a higher work function than the first material.
    Type: Application
    Filed: September 20, 2019
    Publication date: June 18, 2020
    Inventors: Woo-Young PARK, Young-Seok KO, Soo-Gil KIM