Patents by Inventor Soo Gil Kim
Soo Gil Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11967669Abstract: A display device is provided including a substrate. A second semiconductor layer is disposed on the substrate. The second semiconductor layer includes Si. A second gate lower electrode overlaps a channel region of the second semiconductor layer. A second gate insulating layer is disposed on the second gate lower electrode. A second gate upper electrode and a light blocking layer are disposed on the second gate insulating layer. A first auxiliary layer is disposed on the second gate upper electrode and the light blocking layer. A first semiconductor layer overlaps the light blocking layer. The first semiconductor layer includes an oxide semiconductor. A first gate electrode overlaps a channel region of the first semiconductor layer. The first auxiliary layer includes an insulating layer including at least one compound selected from SiNx, SiOx, and SiON, and at least one material selected from F, Cl, and C.Type: GrantFiled: June 17, 2022Date of Patent: April 23, 2024Assignee: SAMSUNG DISPLAY CO., LTD.Inventors: Jae-Bum Han, Young Gil Park, Jung Hwa Park, Na Ri Ahn, Soo Im Jeong, Ki Nam Kim, Moon Sung Kim
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Patent number: 11830549Abstract: Disclosed are a method of operating a selector device, a method of operating a nonvolatile memory apparatus to which the selector device is applied, an electronic circuit device including the selector device, and a nonvolatile memory apparatus. The method of operating the selector device controls access to a memory element, and includes providing the selector device including a switching layer and first and second electrodes disposed on both surfaces of the switching layer, which includes an insulator and a metal element, and applying a multi-step voltage pulse to the switching layer via the first and second electrodes to adjust a threshold voltage of the selector device, the multi-step voltage pulse including a threshold voltage control pulse and an operating voltage pulse. The operating voltage pulse has a magnitude for turning on the selector device, and the threshold voltage control pulse has a lower magnitude lower than the operating voltage pulse.Type: GrantFiled: June 30, 2022Date of Patent: November 28, 2023Assignees: SK hynix Inc., Industry-University Cooperation Foundation Hanyang University ERICA CampusInventors: Tae Jung Ha, Soo Gil Kim, Jeong Hwan Song, Tae Joo Park, Tae Jun Seok, Hye Rim Kim, Hyun Seung Choi
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Publication number: 20230326523Abstract: Operating a selector device that controls access of a signal to a memory element may comprise applying a main operating voltage pulse and a refresh voltage pulse to the selector device. The refresh voltage pulse and main operating voltage pulse have opposite polarities. A magnitude of the main operating voltage pulse is greater than or equal to a threshold voltage for turning on the selector device, and a maximum magnitude of the refresh voltage pulse is less than the threshold voltage. The refresh voltage pulse reduces a difference between the threshold voltage and a turn-off voltage of the selector device, and may be applied immediately before or immediately after the main operating voltage pulse. An electronic circuit may include the selector device and a driving circuit for apply the pulses. A nonvolatile memory may include the driving circuit and a plurality of nonvolatile memory elements each including a selector device.Type: ApplicationFiled: March 22, 2023Publication date: October 12, 2023Inventors: Tae Jung HA, Soo Gil KIM, Jeong Hwan SONG, Byung Joon CHOI, Ha Young LEE
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Patent number: 11770980Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n?1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n?1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n?1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.Type: GrantFiled: August 12, 2020Date of Patent: September 26, 2023Assignee: SK HYNIX INC.Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Min Seok Moon, Jong Koo Lim, Sung Woong Chung
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Patent number: 11730062Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure including a free layer, a pinned layer, and a tunnel barrier layer, the free layer having a variable magnetization direction, the pinned layer having a fixed magnetization direction, the tunnel barrier layer being interposed between the free layer and the pinned layer; and a thermal stability enhanced layer (TSEL) including a homogeneous material having an Fe—O bond.Type: GrantFiled: September 25, 2020Date of Patent: August 15, 2023Assignees: SK hynix Inc., Kioxia CorporationInventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Soo Man Seo, Jong Koo Lim, Taiga Isoda
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Publication number: 20230005537Abstract: Disclosed are a method of operating a selector device, a method of operating a nonvolatile memory apparatus to which the selector device is applied, an electronic circuit device including the selector device, and a nonvolatile memory apparatus. The method of operating the selector device controls access to a memory element, and includes providing the selector device including a switching layer and first and second electrodes disposed on both surfaces of the switching layer, which includes an insulator and a metal element, and applying a multi-step voltage pulse to the switching layer via the first and second electrodes to adjust a threshold voltage of the selector device, the multi-step voltage pulse including a threshold voltage control pulse and an operating voltage pulse. The operating voltage pulse has a magnitude for turning on the selector device, and the threshold voltage control pulse has a lower magnitude lower than the operating voltage pulse.Type: ApplicationFiled: June 30, 2022Publication date: January 5, 2023Inventors: Tae Jung HA, Soo Gil KIM, Jeong Hwan SONG, Tae Joo PARK, Tae Jun SEOK, Hye Rim KIM, Hyun Seung CHOI
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Publication number: 20220240868Abstract: Disclosed are treatment information display device and method for displaying treatment history on an image of teeth in an accumulated manner. The treatment information display method enables a user to recognize at once a past treatment history, a current treatment status, and a future treatment plan by displaying, on the image of teeth, treatment information for the past, present, and future. In addition, the treatment information display method can provide the user with pieces of treatment information displayed on different images of teeth, by displaying, in an accumulated manner, the pieces of treatment information displayed on a plurality of teeth images.Type: ApplicationFiled: June 10, 2020Publication date: August 4, 2022Inventors: Kyoo Ok Choi, Soo Gil Kim
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Patent number: 11223012Abstract: A variable resistance semiconductor device includes a lower conductive wiring; a bottom electrode over the lower conductive wiring; a selection element pattern over the bottom electrode; a first intermediate electrode over the selection element pattern; a second intermediate electrode over the first intermediate electrode; a variable resistance element pattern over the second intermediate electrode; a top electrode over the variable resistance element pattern; and an upper conductive wiring over the top electrode. The first intermediate electrode includes a first material. The second intermediate electrode includes a second material which has a better oxidation resistance and a higher work function than the first material.Type: GrantFiled: September 20, 2019Date of Patent: January 11, 2022Assignee: SK hynix Inc.Inventors: Woo-Young Park, Young-Seok Ko, Soo-Gil Kim
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Patent number: 11183635Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: GrantFiled: September 2, 2020Date of Patent: November 23, 2021Assignee: SK Hynix Inc.Inventors: Joo Young Moon, Young Seok Ko, Soo Gil Kim
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Patent number: 11043533Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.Type: GrantFiled: June 27, 2019Date of Patent: June 22, 2021Assignee: SK hynix Inc.Inventors: Beom Yong Kim, Soo Gil Kim
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Publication number: 20210184101Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a multilayer synthetic anti-ferromagnetic (Multi SAF) structure including a first ferromagnetic layer, a second ferromagnetic layer, and a spacer layer interposed between the first ferromagnetic layer and the second ferromagnetic layer, wherein the spacer layer may include n non-magnetic layers and n?1 magnetic layers that are disposed such that each of the n non-magnetic layers and each of the n?1 magnetic layers are alternately stacked, wherein n indicates an odd number equal to or greater than 3, wherein the n?1 magnetic layers and n non-magnetic layers may be configured to effectuate an antiferromagnetic exchange coupling with at least one of the first ferromagnetic layer and the second ferromagnetic layer.Type: ApplicationFiled: August 12, 2020Publication date: June 17, 2021Inventors: Tae Young Lee, Guk Cheon Kim, Soo Gil Kim, Min Seok Moon, Jong Koo Lim, Sung Woong Chung
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Publication number: 20210184102Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure including a free layer, a pinned layer, and a tunnel barrier layer, the free layer having a variable magnetization direction, the pinned layer having a fixed magnetization direction, the tunnel barrier layer being interposed between the free layer and the pinned layer; and a thermal stability enhanced layer (TSEL) including a homogeneous material having an Fe—O bond.Type: ApplicationFiled: September 25, 2020Publication date: June 17, 2021Inventors: Tae Young LEE, Guk Cheon KIM, Soo Gil KIM, Soo Man SEO, Jong Koo LIM, Taiga ISODA
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Publication number: 20200403155Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: ApplicationFiled: September 2, 2020Publication date: December 24, 2020Inventors: Joo Young MOON, Young Seok KO, Soo Gil KIM
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Patent number: 10797239Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: GrantFiled: May 15, 2019Date of Patent: October 6, 2020Assignee: SK hynix Inc.Inventors: Joo Young Moon, Young Seok Ko, Soo Gil Kim
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Publication number: 20200194667Abstract: A variable resistance semiconductor device includes a lower conductive wiring; a bottom electrode over the lower conductive wiring; a selection element pattern over the bottom electrode; a first intermediate electrode over the selection element pattern; a second intermediate electrode over the first intermediate electrode; a variable resistance element pattern over the second intermediate electrode; a top electrode over the variable resistance element pattern; and an upper conductive wiring over the top electrode. The first intermediate electrode includes a first material. The second intermediate electrode includes a second material which has a better oxidation resistance and a higher work function than the first material.Type: ApplicationFiled: September 20, 2019Publication date: June 18, 2020Inventors: Woo-Young PARK, Young-Seok KO, Soo-Gil KIM
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Publication number: 20200144500Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.Type: ApplicationFiled: May 15, 2019Publication date: May 7, 2020Inventors: Joo Young MOON, Young Seok KO, Soo Gil KIM
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Publication number: 20190319070Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.Type: ApplicationFiled: June 27, 2019Publication date: October 17, 2019Inventors: Beom Yong KIM, Soo Gil KIM
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Patent number: 10381407Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.Type: GrantFiled: February 14, 2017Date of Patent: August 13, 2019Assignee: SK hynix Inc.Inventors: Beom Yong Kim, Soo Gil Kim
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Patent number: 10283709Abstract: In an embodiment, a substrate that includes a cell region and a dummy region is provided. Lower interconnection structures are formed in the cell region and the dummy region. One or more first multilayered structure patterns are formed in the cell region and one or more second multilayered structure patterns in the dummy region over the lower interconnection structures. The first multilayered structure patterns and second multilayered structure patterns extend in a first direction. Each of the second multilayered structure patterns includes an etch target layer. An insulating material layer is formed over the first multilayered structure patterns and the second multilayered structure patterns. An interlayer insulating layer that fills a space between two adjacent patterns of the first multilayered structure patterns and second multilayered structure patterns is formed by planarizing the insulating material layer. The etch target layer in each of the second multilayered structure patterns is removed.Type: GrantFiled: November 28, 2017Date of Patent: May 7, 2019Assignee: SK HYNIX INC.Inventors: Young Seok Ko, Soo Gil Kim, Joo Young Moon
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Patent number: 10263184Abstract: A switching device includes a first switching element having a snap-back behavior characteristic, an output voltage of the first switching element decreasing when an input current increases from a turn-on threshold current of the first switching element. The switching device further includes a second switching element having a continuous-resistance behavior characteristic, an output voltage of the second switching element increasing when the input current increases from a turn-on threshold current of the second switching element. The turn-on threshold current of the first switching element is lower than the turn-on threshold current of the second switching element.Type: GrantFiled: May 11, 2018Date of Patent: April 16, 2019Assignee: SK hynix Inc.Inventors: Tae Jung Ha, Soo Gil Kim