Patents by Inventor Soo Gil Park

Soo Gil Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967669
    Abstract: A display device is provided including a substrate. A second semiconductor layer is disposed on the substrate. The second semiconductor layer includes Si. A second gate lower electrode overlaps a channel region of the second semiconductor layer. A second gate insulating layer is disposed on the second gate lower electrode. A second gate upper electrode and a light blocking layer are disposed on the second gate insulating layer. A first auxiliary layer is disposed on the second gate upper electrode and the light blocking layer. A first semiconductor layer overlaps the light blocking layer. The first semiconductor layer includes an oxide semiconductor. A first gate electrode overlaps a channel region of the first semiconductor layer. The first auxiliary layer includes an insulating layer including at least one compound selected from SiNx, SiOx, and SiON, and at least one material selected from F, Cl, and C.
    Type: Grant
    Filed: June 17, 2022
    Date of Patent: April 23, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jae-Bum Han, Young Gil Park, Jung Hwa Park, Na Ri Ahn, Soo Im Jeong, Ki Nam Kim, Moon Sung Kim
  • Publication number: 20210164068
    Abstract: The purpose of the present invention is to provide a steel material and a manufacturing method for the same, wherein the steel material has excellent strength, elongation, and impact toughness as well as excellent inside quality and wear resistance. According to the present invention, provided are a steel material having excellent wear resistance and a manufacturing method for the same, wherein. the steel material contains, in weight, 0.55-1.4% carbon (C), 12-23% manganese (Mn), 5% or less (excluding 0%) chromium (Cr), 5% or less (excluding 0%) copper (Cu), 0.5% or less (excluding 0%) Al, 1.0% or less (excluding 0%) Si, 0.02% or less (including 0%) S, 0.04% or less (including 0%) phosphor (P), and the balance Fe and unavoidable impurities, and has a microstructure comprising, in area, 10% or less (including 0%) carbide and the balance austenite.
    Type: Application
    Filed: December 20, 2018
    Publication date: June 3, 2021
    Inventors: Yong-Jin KIM, Young-Deok JUNG, Myeong-Hun KANG, Yeo-Sun YUN, Soo-Gil PARK
  • Publication number: 20090218703
    Abstract: A lamination tape is disclosed which includes a base film with an adhesive layer on one side wherein the coefficient of thermal expansion (CTE) of the adhesive layer is adapted so as to reduce warpage of a semiconductor die when the lamination tape is attached to the passive side of the semiconductor die.
    Type: Application
    Filed: February 29, 2008
    Publication date: September 3, 2009
    Inventors: Soo Gil Park, Kimyung Yoon
  • Publication number: 20090032946
    Abstract: Integrated circuits and methods for making integrated circuits having a base layer, a side substrate, a circuit substrate and a connection. A bottom face of the base layer is disposed on the side substrate. The side substrate includes a first contact field, at least a second contact field, and a signal line. The first contact field is arranged on the bottom face in an area of an opening of the base layer, the second contact field is arranged on another face of the side substrate, and the signal line connects the first contact field to the second contact field. The circuit substrate is disposed on the base layer and alongside the side substrate. The connection connects the circuit substrate to the second contact field of the side substrate.
    Type: Application
    Filed: August 1, 2007
    Publication date: February 5, 2009
    Inventor: Soo Gil Park
  • Patent number: 7476980
    Abstract: A die configuration includes a die having an active side and an inactive side being opposed to the active side. The inactive side is connected to a heat sink. The connecting members can be provided on the active side.
    Type: Grant
    Filed: June 27, 2006
    Date of Patent: January 13, 2009
    Assignee: Infineon Technologies AG
    Inventors: Kenneth Rebibis, Soo Gil Park
  • Publication number: 20070298603
    Abstract: A die configuration includes a die having an active side and an inactive side being opposed to the active side. The inactive side is connected to a heat sink. The connecting members can be provided on the active side.
    Type: Application
    Filed: June 27, 2006
    Publication date: December 27, 2007
    Inventors: Kenneth Rebibis, Soo Gil Park