Patents by Inventor Soo-Guy Rho

Soo-Guy Rho has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040115558
    Abstract: The present invention relates to a new photosensitive resin composition capable of solubility control and a pattern formation method of a double-layer structure using the same, and more particularly to a photosensitive resin composition that can control the &ggr;-value using a new photopolymerization initiator and lower layer hardener and that can control a film thickness according to the exposure energy without pattern breakup, even with low exposure energy. This photosensitive resin composition is useful for color filters and overcoating materials of LCD (liquid crystal display) manufacturing processes.
    Type: Application
    Filed: September 30, 2003
    Publication date: June 17, 2004
    Inventors: Seok-Yoon Yang, Gil-Lae Kim, Chan-Seok Park, Choon-Ho Park, Soo-Guy Rho
  • Publication number: 20040114071
    Abstract: A transflective liquid crystal display including upper and lower panels facing each other. A plurality of gate lines and a plurality of data lines intersecting each other are formed on the lower panel to define pixel areas arranged in a matrix. A plurality of thin film transistors connected to the gate lines and the data lines and a plurality of pixel electrodes connected to the thin film transistors are also provided on the lower panel. Each pixel electrode includes a transparent electrode and a reflecting electrode with high reflectance having a transmitting window. A black matrix having apertures opposite the pixel areas and a plurality of red, green and blue color filters are formed on the upper panel, and a passivation layer covers the color filters. The passivation layer includes thicker and thinner portions, and the thinner portion is disposed opposite the transmitting window.
    Type: Application
    Filed: December 1, 2003
    Publication date: June 17, 2004
    Inventor: Soo-Guy Rho
  • Publication number: 20040085495
    Abstract: Pixels of red, blue and green are sequentially arranged in the row. The red and green pixels are alternately arranged in the column while the blue pixels being repeatedly arranged in the column. The four red and green pixels surrounding the two blue pixels at the two neighboring pixel rows face each other around the blue pixels. Gate lines are arranged at the respective rows to transmit scanning signals. Data lines cross over the gate lines in an insulating manner, and are arranged at the respective columns to transmit picture signals. Pixel electrodes and thin film transistor are formed at respective pixels. The blue pixel has the same area as or an area smaller than the red and green pixels. The pixel electrodes are overlapped with the gate or the data lines via a passivation layer of low dielectric organic material or an insulating material such as SiOC, SiOF.
    Type: Application
    Filed: September 4, 2003
    Publication date: May 6, 2004
    Inventors: Nam-Seok Roh, Mun-Pyo Hong, Chong-chul Chai, Soo-Guy Rho
  • Publication number: 20040080684
    Abstract: A transflective liquid crystal display includes upper and lower panels facing each other. On the lower panel, there formed a plurality of gate lines and a plurality of data lines intersecting each other to define pixel areas arranged in a matrix. A plurality of thin film transistors connected to the gate lines and the data lines and a plurality of pixel electrodes connected to the thin film transistors are also provided on the lower panel. Each pixel electrode includes a transparent electrode and a reflecting electrode with high reflectance having a transmitting window. A black matrix having apertures opposite the pixel areas and a plurality of red, green and blue color filters are formed on the upper panel. Each color filter includes thicker and thinner portions, and the thicker portion opposite the transmitting window.
    Type: Application
    Filed: October 25, 2002
    Publication date: April 29, 2004
    Inventor: Soo-Guy Rho
  • Publication number: 20040051103
    Abstract: A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 18, 2004
    Inventors: Mun-Pyo Hong, Wan-Shick Hong, Sang-Il Kim, Soo-Guy Rho, Jin-Kyu Kang, Snag-Gab Kim
  • Publication number: 20040046905
    Abstract: A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode.
    Type: Application
    Filed: September 12, 2003
    Publication date: March 11, 2004
    Inventors: Mun-Pyo Hong, Wan-Shick Hong, Sang-Il Kim, Soo-Guy Rho, Jin-Kyu Kang, Snag-Gab Kim
  • Patent number: 6674495
    Abstract: A black matrix having an opening at pixels of a matrix array in a display area, a common wire including common pads and common signal lines, and gate pads in a peripheral area, and an alignment key in outer area to align interlayer thin films are formed on an insulating substrate. Red, blue and green color filters the edge of which overlap the black matrix are formed at the pixels on the insulating substrate, and an organic insulating layer covering the black matrix and the color filters and having a contact hole exposing the gate pad is formed thereon. A gate wire including a gate line connected to the gate pad through the contact hole and a gate electrode connected to the gate line is formed on the organic insulating layer, and a gate insulating layer covering the gate wire is formed on the organic insulating layer. A semiconductor pattern and ohmic contact layers are sequentially formed on the gate insulating layer of the gate electrode.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: January 6, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Mun-Pyo Hong, Wan-Shick Hong, Sang-Il Kim, Soo-Guy Rho, Jin-Kyu Kang, Snag-Gab Kim
  • Publication number: 20030179325
    Abstract: A passivation layer is formed by coating a flowable insulating material on the substrate where a thin film transistor and a storage capacitor electrode, and a pixel electrode is formed on the passivation layer. A portion of the passivation layer is etched using the pixel electrode as a mask to make a groove on the thin film transistor, and then a black matrix is formed by filling an organic black photoresist in the groove. To increase the storage capacitance, a portion of the passivation layer is removed or to form a metal pattern on the storage capacitor electrode. A flowable insulating material is used as a gate insulating layer to planarize the substrate. In the case of the etch stopper type thin film transistor, a photo definable material is used as the etch stopper layer to reduce the parasitic capacitance between the gate electrode and the drain electrode.
    Type: Application
    Filed: March 12, 2003
    Publication date: September 25, 2003
    Inventors: Soo-Guy Rho, Jung-Ho Lee
  • Publication number: 20030160918
    Abstract: Disclosed are a transreflective type LCD and a method of manufacturing the same. A color filter substrate is formed with a light transreflective member for reflecting an external light or transmitting an artificial light and a visual angle increasing member for increasing the visual angle of the light from the light transreflective member. A thickness of a color filter varies to obtain a uniformity of the light from the light transreflective member regardless of the transmissive and the reflective modes. The light from the light transreflective member is provided through a TFT substrate to a user as an image.
    Type: Application
    Filed: August 6, 2002
    Publication date: August 28, 2003
    Inventor: Soo-Guy Rho
  • Patent number: 6597415
    Abstract: A passivation layer is formed by coating a flowable insulating material on the substrate where a thin film transistor and a storage capacitor electrode, and a pixel electrode is formed on the passivation layer. A portion of the passivation layer is etched using the pixel electrode as a mask to make a groove on the thin film transistor, and then a black matrix is formed by filling an organic black photoresist in the groove. To increase the storage capacitance, a portion of the passivation layer is removed or to form a metal pattern on the storage capacitor electrode. A flowable insulating material is used as a gate insulating layer to planarize the substrate. In the case of the etch stopper type thin film transistor, a photo definable material is used as the etch stopper layer to reduce the parasitic capacitance between the gate electrode and the drain electrode.
    Type: Grant
    Filed: March 7, 2001
    Date of Patent: July 22, 2003
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Guy Rho, Jung-Ho Lee
  • Publication number: 20010010567
    Abstract: A passivation layer is formed by coating a flowable insulating material on the substrate where a thin film transistor and a storage capacitor electrode, and a pixel electrode is formed on the passivation layer. A portion of the passivation layer is etched using the pixel electrode as a mask to make a groove on the thin film transistor, and then a black matrix is formed by filling an organic black photoresist in the groove. To increase the storage capacitance, a portion of the passivation layer is removed or to form a metal pattern on the storage capacitor electrode. A flowable insulating material is used as a gate insulating layer to planarize the substrate. In the case of the etch stopper type thin film transistor, a photo definable material is used as the etch stopper layer to reduce the parasitic capacitance between the gate electrode and the drain electrode.
    Type: Application
    Filed: March 7, 2001
    Publication date: August 2, 2001
    Inventors: Soo-Guy Rho, Jung-Ho Lee
  • Patent number: 6243146
    Abstract: A passivation layer is formed by coating a flowable insulating material on the substrate where a thin film transistor and a storage capacitor electrode, and a pixel electrode is formed on the passivation layer. A portion of the passivation layer is etched using the pixel electrode as a mask to make a groove on the thin film transistor, and then a black matrix is formed by filling an organic black photoresist in the groove. To increase the storage capacitance, a portion of the passivation layer is removed or to form a metal pattern on the storage capacitor electrode. A flowable insulating material is used as a gate insulating layer to planarize the substrate. In the case of the etch stopper type thin film transistor, a photo definable material is used as the etch stopper layer to reduce the parasitic capacitance between the gate electrode and the drain electrode.
    Type: Grant
    Filed: March 21, 2000
    Date of Patent: June 5, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Guy Rho, Jung-Ho Lee
  • Patent number: 6057896
    Abstract: A passivation layer is formed by coating a flowable insulating material on the substrate where a thin film transistor and a storage capacitor electrode, and a pixel electrode is formed on the passivation layer. A portion of the passivation layer is etched using the pixel electrode as a mask to make a groove on the thin film transistor, and then a black matrix is formed by filling an organic black photoresist in the groove. To increase the storage capacitance, a portion of the passivation layer is removed or to form a metal pattern on the storage capacitor electrode. A flowable insulating material is used as a gate insulating layer to planarize the substrate. In the case of the etch stopper type thin film transistor, a photo definable material is used as the etch stopper layer to reduce the parasitic capacitance between the gate electrode and the drain electrode.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: May 2, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Guy Rho, Jung-Ho Lee