Abstract: Provided herein may be a stage and an emission control driver having the same. The stage may include an output unit configured to supply a voltage of a first or second power supply to a first output terminal depending on voltages of first and second nodes, an input unit configured to control the voltages of the second node and a third node, a first signal processing unit configured to control the voltage of the first node, and supply a voltage corresponding to the first node to a second output terminal, a second signal processing unit including a second capacitor coupled between the third node and a fifth node, the second signal processing unit being configured to control the voltage of the first node, and control a potential difference between opposite terminals of the second capacitor, and a third signal processing unit configured to control the voltage of the second node.

Abstract: A display device includes a flexible display panel and a protective film. The protective film includes a film main body and a first adhesion portion. The film main body has a first surface contacting the flexible display panel and a first recess portion recessed from the first surface, and the first adhesion portion is in the first recess portion.

Abstract: A display device includes a flexible display panel and a protective film. The protective film includes a film main body and a first adhesion portion. The film main body has a first surface contacting the flexible display panel and a first recess portion recessed from the first surface, and the first adhesion portion is in the first recess portion.

Abstract: A pixel circuit, includes: an organic light-emitting diode; a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node; a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line; a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line; a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode.

Abstract: A stage of a scan driver for a display device, the stage includes: an output unit to output to an output terminal either a signal supplied to a first clock terminal corresponding to voltage of a first driving node or a voltage of a second power source corresponding to voltage of a second driving node; an input unit to control the voltage of the first driving node corresponding to signals supplied to a first input terminal, and the input unit to control the voltage of the second driving node corresponding to signals supplied to a second input terminal and a second clock terminal; a first signal processor including a second capacitor coupled between the second driving node and a second node, the first signal processor to control the voltage of the second driving node corresponding to signals supplied to a third clock terminal and a fourth clock terminal, the first signal processor to control a potential difference between both ends of the second capacitor corresponding to the signal supplied to the fourth clock

Abstract: A display device includes: scan, control, and emission control signal lines, signals transmitted thereby being different from one another; data and driving voltage lines; a first transistor including a first gate electrode and first source and drain; a second transistor including a second gate electrode connected to a first scan line, a second source connected to a first data line, and a second drain connected to the first source; a light-emitting element; a control transistor including a control gate electrode connected to a first control line and between the driving voltage line and the first source or the light-emitting element and the first drain; and an emission control transistor in series between the light-emitting element and the control transistor, the control transistor and the first transistor, or the driving voltage line and the control transistor, and an emission control gate electrode connected to the emission control signal line.

Abstract: A scan driver includes: a first transistor having a first electrode coupled to an output scan line, a second electrode coupled to a first power line, and a gate electrode coupled to a first node; a second transistor having a first electrode coupled to a first clock line, a second electrode coupled to the output scan line, and a gate electrode coupled to a second node; a third transistor having a first electrode coupled to the first node, a second electrode coupled to a first input scan line, and a gate electrode coupled to a second clock line; and a fourth transistor having a first electrode coupled to the second node and a second electrode and a gate electrode, which are coupled to a second input scan line, wherein the first input scan line and the second input scan line are different from each other.

Abstract: A stage and a scan driver including the same for supplying a scan signal using a stage formed of P-type transistors to prevent output of an unwanted noise in a period where the scan signal is not supplied.

Abstract: Provided herein may be a stage and an emission control driver having the same. The stage may include an output unit configured to supply a voltage of a first or second power supply to a first output terminal depending on voltages of first and second nodes, an input unit configured to control the voltages of the second node and a third node, a first signal processing unit configured to control the voltage of the first node, and supply a voltage corresponding to the first node to a second output terminal, a second signal processing unit including a second capacitor coupled between the third node and a fifth node, the second signal processing unit being configured to control the voltage of the first node, and control a potential difference between opposite terminals of the second capacitor, and a third signal processing unit configured to control the voltage of the second node.

Abstract: A pixel circuit, includes: an organic light-emitting diode; a first transistor coupled between a second node and a third node, wherein a gate electrode of the first transistor is coupled to a first node; a second transistor coupled between a data line and the second node, wherein a gate electrode of the second transistor is coupled to a first scan line; a fourth transistor coupled between the first node and an initialization power source, wherein a gate electrode of the fourth transistor is coupled to a second scan line; a fifth transistor coupled between a first power source and the second node, wherein a gate electrode of the fifth transistor is coupled to a first emission line; and a sixth transistor and an eighth transistor coupled in series between the third node and the organic light-emitting diode.

Abstract: A pixel circuit includes: an organic light emitting diode (OLED); a first transistor having first and second electrodes and a first gate electrode; a second transistor connected between a data line and the first electrode, controlled by a first scan line; a third transistor connected between the second electrode and the a electrode of the first transistor, controlled by the first scan line; a fourth transistor connected between the first gate electrode and a first initialization voltage line, controlled by a second scan line; a fifth transistor connected between a power line and first electrode, controlled by a first emission line; a sixth transistor connected between the second electrode and the OLED and controlled by a second emission line; and a storage capacitor connected between the first gate electrode and the power line, wherein the first emission line and the second emission line are located at different nodes.

Abstract: A display device includes a scan driver configured to provide a scan signal to the scan line, the scan signal having an ON voltage for turning on a transistor in a plurality of horizontal periods including a current horizontal period and at least one previous horizontal period corresponding to the scan signal, and a grayscale data processor configured to correct current grayscale data of a current pixel corresponding to the current horizontal period to generate correction grayscale data based on previous grayscale data of a previous pixel corresponding to the previous horizontal period, the current pixel included in a same pixel column as the previous pixel.

Abstract: An organic light emitting display device includes: a pixel unit including a plurality of pixels; a scan driver for sequentially supplying a scan signal to the pixels through scan lines, wherein the scan signal includes k (k is a natural number) bias pulses for applying a bias voltage and one write pulse for applying a data voltage; a data corrector for correcting a first grayscale value that is a grayscale value of a (j, i) pixel (i and j are natural numbers) among the pixels, based on a difference between the first grayscale value and a second grayscale value that is a grayscale value of a (j+2k, i) pixel among the pixels; and a data driver for supplying a data voltage corresponding to each of the grayscale values to the pixel unit through a plurality of data lines.

Abstract: A method of driving an optical modulation device includes applying a voltage to an upper electrode; forming a forward phase slope by applying a first driving signal to a lower electrode in a first area; forming a backward phase slope by applying a second driving signal different from the first driving signal to another lower electrode in a second area; forming an area without phase retardation by applying a third driving signal to two lower electrodes in a third area between the first area and the second area; and forming a flat phase slope by applying a fourth driving signal different from the first to third driving signals one lower electrode in a fourth area between the first area and the second area.

Abstract: An optical modulation device or an optical device including the same includes: a first plate and a second plate facing the first plate; and a liquid crystal layer between the first plate and the second plate and including a plurality of liquid crystal molecules, wherein the first plate includes a plurality of first electrodes and a first aligner, the second plate includes at least one second electrode and a second aligner, and an alignment direction of the first aligner is substantially parallel to an alignment direction of the second aligner and wherein portions of the first plate, the second plate, and the liquid crystal layer between the first and second plates are individual units.

Abstract: A method for driving an optical modulation device is provided. The optical modulation device includes first and second portions. Each of the first and second portions includes a first plate, a second plate opposite to the first plate, and a liquid crystal layer disposed between the first and second plates. The method includes forming a forward phase gradient in the first portion by applying a first driving signal to first and second electrodes in the first plate of the first portion and a third electrode in the second plate of the first portion. The method further includes forming a reverse phase gradient in the second portion by applying a second driving signal differing from the first driving signal to fourth and fifth electrodes in the first plate of the second portion and a sixth electrode in the second plate of the second portion.

Abstract: A display device includes a flexible display panel and a protective film. The protective film includes a film main body and a first adhesion portion. The film main body has a first surface contacting the flexible display panel and a first recess portion recessed from the first surface, and the first adhesion portion is in the first recess portion.

Abstract: A liquid crystal lens includes a lower substrate, an upper substrate disposed opposite to the lower substrate, a plurality of lower lens electrodes disposed on the lower substrate and corresponding to a unit liquid crystal lens, an upper lens electrode disposed on substantially an entire surface of the upper substrate, a spacer disposed between the lower substrate and the upper substrate, and a liquid crystal layer disposed between the lower substrate and the upper substrate, where the lower lens electrodes includes a flat-shaped central lens electrode disposed at a central portion thereof and has a width wider than a width of other lower lens electrodes corresponding to the unit liquid crystal lens, and the spacer is disposed only on the central lens electrode.