Abstract: Provided is a novel JAK-specific inhibitor compound and a method for preparing the same. The compound of the provided can exhibit therapeutic effects on a variety of diseases, for example, inflammatory diseases, autoimmune diseases, myeloproliferative diseases, and human cancers due to its ability to regulate signal transduction at the level of JAK kinases. In particular, due to its high selectivity for JAK1, the compound of the provided can exhibit better therapeutic effects on inflammatory diseases and autoimmune diseases at a low dose and with fewer side effects and can be expected to be effective in preventing and treating liver fibrosis.

Abstract: A light-emitting element includes a first semiconductor layer doped to have a first polarity, a second semiconductor layer doped to have a second polarity different from the first polarity, a light-emitting layer disposed between the first and second semiconductor layers, a shell layer formed on side surfaces of the first semiconductor layer, the light-emitting layer, and the second semiconductor layer, the shell layer including a divalent metal element, and an insulating film covering an outer surface of the shell layer and surrounding the side surface of the light-emitting layer.

Abstract: A method for manufacturing a gas diffusion layer for a fuel cell wherein carbon nanotubes are impregnated into Korean paper, thereby enhancing electroconductivity, and a gas diffusion layer manufactured thereby. The method for manufacturing a gas diffusion layer for a fuel cell which is to manufacture a gas diffusion layer as a constituent member of a unit cell in a fuel cell, includes a support preparation step of preparing a support with Korean paper; a dispersion preparation step of dispersing a carbon substance in a solvent to form a dispersion, a coating step of coating the support with the dispersion, and a thermal treatment step of thermally treating the dispersion-coated support to fix the carbon substance to the support.

Abstract: The present disclosure relates to a method for manufacturing carboxymethyl cellulose particles, cellulose inducer particles manufactured by the method, and an absorbent article comprising same.

Abstract: Disclosed is an image processing apparatus, which can differently set a clock ratio according to a use rate of a CPU, and a control method thereof. The image processing apparatus may include a receiver to receive a print command from a user terminal, and a controller to differently set a clock ratio according to a use rate of the CPU based on the print command.

Abstract: An image forming apparatus including a multi-processor and an image forming method thereof. The apparatus includes a data processing unit to divide input print data into a plurality of divided print data according to a predetermined criterion and to simultaneously process the plurality of divided print data using a multi-processor, and an image forming unit to form an image corresponding to the processed print data.

Abstract: An image forming apparatus including: a communication interface unit to receive print data; an image processing unit to convert the received print data into pages of bitmap image data; an image forming unit to print the pages and having a queuing time; and a queuing time changing unit to change the queuing time according to a conversion time of the print data by the image processing unit.

Abstract: An image forming apparatus including a multi-processor and an image forming method thereof. The apparatus includes a data processing unit to divide input print data into a plurality of divided print data according to a predetermined criterion and to simultaneously process the plurality of divided print data using a multi-processor, and an image forming unit to form an image corresponding to the processed print data.

Abstract: An image forming apparatus including: a communication interface unit to receive print data; an image processing unit to convert the received print data into pages of bitmap image data; an image forming unit to print the pages and having a queuing time; and a queuing time changing unit to change the queuing time according to a conversion time of the print data by the image processing unit.

Abstract: An image forming apparatus including a chip having an engine processor and a basic processor includes an image forming unit which has an image forming engine and forms an image of given image data, an engine processor to control a driving of the image forming engine, and a basic processor which is integrally provided with the engine processor and controls processes related to image formation except the driving of the image forming engine.

Abstract: An image forming apparatus including a chip having an engine processor and a basic processor includes an image forming unit which has an image forming engine and forms an image of given image data, an engine processor to control a driving of the image forming engine, and a basic processor which is integrally provided with the engine processor and controls processes related to image formation except the driving of the image forming engine.

Abstract: An image forming apparatus including a chip having an engine processor and a basic processor includes an image forming unit which has an image forming engine and forms an image of given image data, an engine processor to control a driving of the image forming engine, and a basic processor which is integrally provided with the engine processor and controls processes related to image formation except the driving of the image forming engine.

Abstract: An image forming apparatus including a chip having an engine processor and a basic processor includes an image forming unit which has an image forming engine and forms an image of given image data, an engine processor to control a driving of the image forming engine, and a basic processor which is integrally provided with the engine processor and controls processes related to image formation except the driving of the image forming engine.

Abstract: An image forming apparatus including a chip having an engine processor and a basic processor includes an image forming unit which has an image forming engine and forms an image of given image data, an engine processor to control a driving of the image forming engine, and a basic processor which is integrally provided with the engine processor and controls processes related to image formation except the driving of the image forming engine.

Abstract: Disclosed is an image processing apparatus, which can differently set a clock ratio according to a use rate of a CPU, and a control method thereof. The image processing apparatus may include a receiver to receive a print command from a user terminal, and a controller to differently set a clock ratio according to a use rate of the CPU based on the print command.

Abstract: Provided are a method and apparatus for reducing the number of power ports equipped with an integrated circuit (IC) apparatus by reducing the number of bus outputs that are simultaneously switched, with the use of a master clock signal and a slave clock signal, which is a variation of the master clock signal. The IC apparatus includes a slave clock signal generator, which receives the master clock signal and generates a slave clock signal for controlling simultaneously switching outputs; and a flipflop circuit, which transmits a signal to an external device in synchronization with the slave clock signal.

Abstract: An image forming apparatus including a multi-processor and an image forming method thereof. The apparatus includes a data processing unit to divide input print data into a plurality of divided print data according to a predetermined criterion and to simultaneously process the plurality of divided print data using a multi-processor, and an image forming unit to form an image corresponding to the processed print data.

Abstract: A method and apparatus to initialize a central processing unit (CPU). The apparatus includes: the CPU decoding a program command of an electronic device and executing the command; a first memory to store a booting program to boot the electronic device and initialization data to initialize the CPU; and a CPU initialization unit to read the booting program and the initialization data from the first memory and to send the booting program and the initialization data to the CPU, wherein the CPU is initialized by using the initialization data. Accordingly, the apparatus can initialize the CPU without using a memory such as an EEPROM, and hence reduce the manufacturing costs of an electronic device. Further, since a memory such as an EEPROM for initialization of the CPU is not used, and therefore does not need to be programmed, the memory region for the program is not necessary, and therefore the size of a board can be reduced.

Abstract: A refresh controlling method and a refresh controlling apparatus includes a count initialization value setting unit to set a count initialization value at an initial refresh interval or a changed refresh interval, and a bus request signal generation unit to generate a bus request signal when the count initialization value is completely lapsed. The apparatus also includes a refresh signal generator generate a refresh signal when a bus approval signal is generated by detection of a bus blank period, during which a bus request signal is not received from bus master devices, or when a bus approval signal is generated in response to the bus request signal received from the bus request signal generation unit. According to a logic signal received from the bus request signal generation unit, a bus blank determiner determines whether the bus approval signal has been generated due to the bus blank period.

Abstract: Provided are a method and apparatus for reducing the number of power ports equipped with an integrated circuit (IC) apparatus by reducing the number of bus outputs that are simultaneously switched, with the use of a master clock signal and a slave clock signal, which is a variation of the master clock signal. The IC apparatus includes a slave clock signal generator, which receives the master clock signal and generates a slave clock signal for controlling simultaneously switching outputs; and a flipflop circuit, which transmits a signal to an external device in synchronization with the slave clock signal.