Patents by Inventor Soo Hong Ahn

Soo Hong Ahn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11450394
    Abstract: A controller that controls a nonvolatile memory apparatus may include a first memory configured to temporarily store user data, a second memory including a plurality of memory regions composed of one or more meta regions for storing meta data and at least one spare region, and a processor configured to control the first memory and the second memory and perform first start-gap wear leveling on at least one meta region using the at least one spare region as a gap.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: September 20, 2022
    Assignees: SK hynix Inc., Industry-Academic Cooperation Foundation, Yonsei University
    Inventors: Soo Hong Ahn, Eui Young Chung, Young Min Park
  • Patent number: 11372794
    Abstract: A data processing apparatus may include a master device, a slave device, and a controller configured to arbitrate communication between the master device and the slave device by: setting a respective Time-out Counter (TC) for each of requests transmitted from the master device, allocating one or more virtual channels to each of one or more request groups, the one or more virtual channels respectively corresponding to priority levels, associating a request with a virtual channel corresponding to the priority level of the request, for each request group, selecting one of the leading requests of the respective virtual channels according to the TCs and transmitting the selected request to the slave device.
    Type: Grant
    Filed: May 5, 2020
    Date of Patent: June 28, 2022
    Assignee: SK hynix Inc.
    Inventor: Soo Hong Ahn
  • Publication number: 20220180915
    Abstract: A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.
    Type: Application
    Filed: February 22, 2022
    Publication date: June 9, 2022
    Inventors: Hyeong Soo KIM, Soo Hong AHN
  • Publication number: 20210373964
    Abstract: A data processing system includes at least one pooled memory node, at least one processing node, and a switch node coupled to the at least one pooled memory node and the at least one processing node. The data processing system also includes a master node configured to transmit task information to a first processing node among the at least one processing node through the switch node and configured to transmit a memory address range of a first pooled memory node among the at least one pooled memory node to the switch node. The switch node processes a first memory access request transmitted by the first processing node based on the task information, for the first pooled memory node, based on the memory address range.
    Type: Application
    Filed: August 10, 2021
    Publication date: December 2, 2021
    Applicant: SK hynix Inc.
    Inventor: Soo Hong AHN
  • Publication number: 20210365299
    Abstract: A data processing system includes at least one pooled memory node, at least one processing node, and a switch node coupled to the at least one pooled memory node and the at least one processing node. The data processing system also includes a master node configured to transmit task information to a first processing node among the at least one processing node through the switch node and configured to transmit a memory address range of a first pooled memory node among the at least one pooled memory node to the switch node. The switch node processes a first memory access request transmitted by the first processing node based on the task information, for the first pooled memory node, based on the memory address range.
    Type: Application
    Filed: August 10, 2021
    Publication date: November 25, 2021
    Applicant: SK hynix Inc.
    Inventor: Soo Hong AHN
  • Patent number: 11093295
    Abstract: A data processing system includes at least one pooled memory node, at least one processing node, and a switch node coupled to the at least one pooled memory node and the at least one processing node. The data processing system also includes a master node configured to transmit task information to a first processing node among the at least one processing node through the switch node and configured to transmit a memory address range of a first pooled memory node among the at least one pooled memory node to the switch node. The switch node processes a first memory access request transmitted by the first processing node based on the task information, for the first pooled memory node, based on the memory address range.
    Type: Grant
    Filed: December 5, 2018
    Date of Patent: August 17, 2021
    Assignee: SK hynix Inc.
    Inventor: Soo Hong Ahn
  • Publication number: 20210073162
    Abstract: A data processing apparatus may include a master device, a slave device, and a controller configured to arbitrate communication between the master device and the slave device by: setting a respective Time-out Counter (TC) for each of requests transmitted from the master device, allocating one or more virtual channels to each of one or more request groups, the one or more virtual channels respectively corresponding to priority levels, associating a request with a virtual channel corresponding to the priority level of the request, for each request group, selecting one of the leading requests of the respective virtual channels according to the TCs and transmitting the selected request to the slave device.
    Type: Application
    Filed: May 5, 2020
    Publication date: March 11, 2021
    Inventor: Soo Hong AHN
  • Publication number: 20210074373
    Abstract: A controller that controls a nonvolatile memory apparatus may include a first memory configured to temporarily store user data, a second memory including a plurality of memory regions composed of one or more meta regions for storing meta data and at least one spare region, and a processor configured to control the first memory and the second memory and perform first start-gap wear leveling on at least one meta region using the at least one spare region as a gap.
    Type: Application
    Filed: August 26, 2020
    Publication date: March 11, 2021
    Inventors: Soo Hong AHN, Eui Young CHUNG, Young Min PARK
  • Publication number: 20190341097
    Abstract: A data processing system may include a plurality of memory modules, a controller, a power supply and a plurality of switches. Each of the memory modules may include a plurality of pages. The controller may control operations of the memory modules. The power supply may provide the memory modules with a power. The switches may be arranged corresponding to each of the memory modules. The switches may be selectively driven in response to a switch drive signal from the controller.
    Type: Application
    Filed: April 1, 2019
    Publication date: November 7, 2019
    Inventors: Hyeong Soo KIM, Soo Hong AHN
  • Publication number: 20190324818
    Abstract: A data processing system includes at least one pooled memory node, at least one processing node, and a switch node coupled to the at least one pooled memory node and the at least one processing node. The data processing system also includes a master node configured to transmit task information to a first processing node among the at least one processing node through the switch node and configured to transmit a memory address range of a first pooled memory node among the at least one pooled memory node to the to switch node. The switch node processes a first memory access request transmitted by the first processing node based on the task information, for the first pooled memory node, based on the memory address range.
    Type: Application
    Filed: December 5, 2018
    Publication date: October 24, 2019
    Applicant: SK hynix Inc.
    Inventor: Soo Hong AHN
  • Patent number: 10156997
    Abstract: A data storage device includes a nonvolatile memory device including a memory region, the memory region including a plurality of memory units; and a controller suitable for monitoring an elapsed time and a write count of the memory region, and performing a wear leveling operation for at least one memory unit selected among the plurality of memory units depending on a monitoring result.
    Type: Grant
    Filed: March 13, 2017
    Date of Patent: December 18, 2018
    Assignee: SK Hynix Inc.
    Inventor: Soo Hong Ahn
  • Patent number: 9966135
    Abstract: A data storage device includes a nonvolatile memory device including a reference memory region and a normal memory region, and suitable for determining whether to perform a refresh operation, based on the reference memory region; and a controller suitable for determining a first memory region in the normal memory region based on wear leveling operation data, and controlling the nonvolatile memory device to perform the refresh operation for a second memory region excluding the first memory region in the normal memory region.
    Type: Grant
    Filed: February 8, 2017
    Date of Patent: May 8, 2018
    Assignee: SK Hynix Inc.
    Inventors: Soo Hong Ahn, Il Park
  • Publication number: 20180107386
    Abstract: A data storage device includes a nonvolatile memory device including a memory region, the memory region including a plurality of memory units; and a controller suitable for monitoring an elapsed time and a write count of the memory region, and performing a wear leveling operation for at least one memory unit selected among the plurality of memory units depending on a monitoring result.
    Type: Application
    Filed: March 13, 2017
    Publication date: April 19, 2018
    Inventor: Soo Hong AHN
  • Publication number: 20180102169
    Abstract: A data storage device includes a nonvolatile memory device including a reference memory region and a normal memory region, and suitable for determining whether to perform a refresh operation, based on the reference memory region; and a controller suitable for determining a first memory region in the normal memory region based on wear leveling operation data, and controlling the nonvolatile memory device to perform the refresh operation for a second memory region excluding the first memory region in the normal memory region.
    Type: Application
    Filed: February 8, 2017
    Publication date: April 12, 2018
    Inventors: Soo Hong AHN, Il PARK
  • Publication number: 20170264929
    Abstract: Disclosed are a method and a system for providing media streaming by interworking heterogeneous network through a mobile communication network. A method for providing media streaming by interworking heterogeneous network may comprises receiving media data corresponding to media stream requested by a media streaming server from media streaming encoders, multiplexing the received media data in a predefined transport stream format, and performing streaming transport of the multiplexed media data to the media streaming server through a mobile communication network and an internet wired network.
    Type: Application
    Filed: March 7, 2017
    Publication date: September 14, 2017
    Inventors: Soo Hong Ahn, Chang Ki Jin