Abstract: A display panel includes data lines and a unit pixel including a first pixel, a second pixel, and a third pixel, wherein the first pixel includes a common electrode including a first lower electrode, a light shielding pattern, and a second lower electrode, a first upper electrode that overlaps the first lower electrode and forms a first capacitor with the first lower electrode, a second upper electrode that overlaps the second lower electrode and forms a second capacitor with the second lower electrode, a first transistor including an active pattern overlapping the light shielding pattern and a gate electrode overlapping the active pattern, and a light emitting element, and an end of the gate electrode is electrically connected to the first upper electrode, and another end thereof is electrically connected to the second upper electrode.

Abstract: A display apparatus includes: a substrate including a display area and a peripheral area outside the display area; a driving voltage input unit in the peripheral area; a common voltage input unit in the peripheral area and spaced apart from the driving voltage input unit; a signal wiring portion including a plurality of fan-out wirings that overlap the driving voltage input unit and the common voltage input unit; a first dummy wiring portion outside the signal wiring portion and including a plurality of first dummy wirings that overlap the driving voltage input unit; and a second dummy wiring portion outside the signal wiring portion and including a plurality of second dummy wirings that overlap the common voltage input unit.

Abstract: An exposure mask includes a base layer including a first area and a second area spaced apart from a first area in a first direction, a first inspection transmission pattern defined in a first area of a base layer and arranged in a ring shape having at least one connection part in plan view, and a second inspection transmission pattern defined in a second area of a base layer and arranged in a polygonal shape or a circular shape in plan view.

Abstract: A display apparatus includes: a substrate; an organic insulating layer on the substrate; a first electrode on the organic insulating layer; an auxiliary electrode on the organic insulating layer; intaglio patterns in the auxiliary electrode; a bank layer having a first bank opening overlapping with the first electrode, and a second bank opening overlapping with the auxiliary electrode; an intermediate layer on the first electrode and the auxiliary electrode, the intermediate layer having a hole exposing a portion of the auxiliary electrode; and a second electrode on the intermediate layer to overlap with the first electrode and the auxiliary electrode, and contacting the portion of the auxiliary electrode exposed through the hole in the intermediate layer.

Abstract: A display device includes a substrate, a sub-pixel including a transistor including an active pattern disposed on the substrate and a gate electrode disposed on the active pattern and defining a channel area in an area overlapping the active pattern, and a light emitting element disposed on the transistor, a sensing signal line disposed on the gate electrode to overlap the channel area and that transmits a sensing signal to the gate electrode, a source line extending in a first direction, electrically connected to the active pattern, and that transmits an initialization voltage to the active pattern, and a symmetric sub-pixel having a same structure as the sub-pixel, adjacent to the sub-pixel in a second direction intersecting the first direction, and symmetrical to the sub-pixel with respect to an imaginary symmetric line passing through a center of the source line.

Abstract: A display apparatus includes a light-emitting diode disposed on a substrate, the light-emitting diode including a first electrode arranged in a display area, a second electrode disposed on the first electrode, and an emission layer disposed between the first electrode and the second electrode, and a main common voltage line arranged in a non-display area outside the display area, the main common voltage line electrically connected to the second electrode, the main common voltage line including an inner edge adjacent to the display area and an outer edge opposite to the inner edge, and a pattern including bars arranged in a direction from the inner edge to the outer edge.

Abstract: A display device includes a first lower conductive pattern, a second lower conductive pattern, a third lower conductive pattern, a first high power line, a second high power line, and an initialization line, which are disposed in a same layer as each other. The first high power line is disposed between the first lower conductive pattern and the second lower conductive pattern, the second high power line is disposed between the second lower conductive pattern and the third lower conductive pattern, and the initialization line is disposed between the second lower conductive pattern and the third lower conductive pattern.

Abstract: A display device includes a base substrate and first to third color filter layers. The base substrate includes pixel regions and a light blocking region. A pixel region from among the pixel regions includes first to third light emitting regions emitting light of different colors from each other. The light blocking region surrounds the first to third light emitting regions. The first color filter layer is on the base substrate, has a first color, and overlaps the first light emitting regions and an entirety of the light blocking region. The second color filter layer is on the base substrate, has a second color, and overlaps the second light emitting regions and a portion of the light blocking region. The third color filter layer is on the base substrate, has a third color, and overlaps the third light emitting regions and an entirety of the light blocking region.

Abstract: A display device includes a first active pattern, a second active pattern spaced apart from the first active pattern in a plan view, a first connection pattern contacting the first active pattern, a second connection pattern contacting the second active pattern, a first pixel electrode, a second pixel electrode spaced apart from the first pixel electrode in the plan view, a common voltage pattern including a first protrusion portion protruding from a line portion in the plan view and overlapping the second connection pattern in a cross-sectional view, an emission layer disposed on the common voltage pattern, and a common electrode connecting the common voltage pattern.

Abstract: A display device includes an active pattern, a gate electrode, a gate signal line, and a light emitting diode. The active pattern is disposed on a substrate. The gate electrode is disposed on the active pattern and overlaps the active pattern in a plan view. The gate electrode defines a channel area in an area overlapping the active pattern in a plan view. The gate signal line is disposed on the gate electrode. The gate signal line overlaps the channel area in a plan view. The gate signal line transmits a gate signal to the gate electrode. The light emitting diode is disposed on the gate signal line.

Abstract: A display device and a method of inspecting signal lines of the display device facilitating inspection of a large number of signal lines are disclosed. According to one embodiment, the display device includes: a substrate; a first signal line disposed in a display area of the substrate; and a first inspection line disposed in a non-display area of the substrate and connected to the first signal line. The first inspection line includes: a first line connected to the first signal line; a second line disposed on a layer substantially the same as a layer on which the first line is disposed, the second line spaced apart from the first line; and a third line disposed on a layer different from the layer on which the first line and the second line are disposed with an insulating layer interposed therebetween, the third line overlapping at least a portion of the first line and a portion of the second line.

Abstract: A display device includes a bottom substrate including a display area and a non-display area around the display area, a thin film transistor region in the display area, the thin film transistor region including a plurality of thin film transistors and a plurality of pixel electrodes each electrically connected to a respective one of the thin film transistors, a top substrate facing the bottom substrate with the thin film transistor region therebetween, a seal in the non-display area to surround the thin film transistor region, the seal being configured to bond the bottom substrate to the top substrate, a wiring group between the seal and the bottom substrate, the wiring group including a plurality of conductive lines spaced apart from each other by a predetermined interval, and a light-scattering layer between the seal and the top substrate, the light-scattering layer including light-scattering particles.

Abstract: A display device including: a first substrate; a gate line extending along a first direction on the first substrate; a data line disposed on the first substrate, insulated from the gate line, and extending along a second direction that intersects the first direction; a gate electrode protruding from the gate line; a source electrode extending from the data line; a drain electrode spaced apart from the source electrode; a pixel electrode electrically connected to the drain electrode; and a storage electrode spaced apart from the gate line and the gate electrode. The drain electrode includes a first overlap portion overlapping the gate electrode and a second overlap portion overlapping the storage electrode, and the second overlap portion overlaps at least a part of the pixel electrode.

Abstract: A display device includes a bottom substrate including a display area and a non-display area around the display area, a thin film transistor region in the display area, the thin film transistor region including a plurality of thin film transistors and a plurality of pixel electrodes each electrically connected to a respective one of the thin film transistors, a top substrate facing the bottom substrate with the thin film transistor region therebetween, a seal in the non-display area to surround the thin film transistor region, the seal being configured to bond the bottom substrate to the top substrate, a wiring group between the seal and the bottom substrate, the wiring group including a plurality of conductive lines spaced apart from each other by a predetermined interval, and a light-scattering layer between the seal and the top substrate, the light-scattering layer including light-scattering particles.

Abstract: A display device and a method of inspecting signal lines of the display device facilitating inspection of a large number of signal lines are disclosed. According to one embodiment, the display device includes: a substrate; a first signal line disposed in a display area of the substrate; and a first inspection line disposed in a non-display area of the substrate and connected to the first signal line. The first inspection line includes: a first line connected to the first signal line; a second line disposed on a layer substantially the same as a layer on which the first line is disposed, the second line spaced apart from the first line; and a third line disposed on a layer different from the layer on which the first line and the second line are disposed with an insulating layer interposed therebetween, the third line overlapping at least a portion of the first line and a portion of the second line.

Abstract: A display device including: a first substrate; a gate line extending along a first direction on the first substrate; a data line disposed on the first substrate, insulated from the gate line, and extending along a second direction that intersects the first direction; a gate electrode protruding from the gate line; a source electrode extending from the data line; a drain electrode spaced apart from the source electrode; a pixel electrode electrically connected to the drain electrode; and a storage electrode spaced apart from the gate line and the gate electrode. The drain electrode includes a first overlap portion overlapping the gate electrode and a second overlap portion overlapping the storage electrode, and the second overlap portion overlaps at least a part of the pixel electrode.