Patents by Inventor Soo-hwan Jeong

Soo-hwan Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11420543
    Abstract: The present disclosure provides a seat track mechanism installed beneath a vehicle seat in order to move the vehicle seat in the forward and backward directions. A monotrack mechanism, to which a monopost structure and a single rail structure are applied, is installed at the bottom of the seat. The seat track mechanism includes a structure for hook-engaging lower and upper rails constituting the mono track mechanism by hook guides, thereby being capable of securing sufficient strength upon head-on or rear-end collision. The present disclosure also provides a seat track mechanism for a vehicle including a locking mechanism capable of enhancing stability of a passenger through structural reinforcement given at the bottom of the vehicle when it is necessary to ensure safety of the passenger in a situation such as collision or sudden stop or the like.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: August 23, 2022
    Assignee: HYUNDAI TRANSYS INC.
    Inventors: Soo Hwan Jeong, Jae Sung Lee, Jae Sang Lim
  • Patent number: 11001169
    Abstract: A seat swivel mechanism secured under a vehicle seat and configured to swivel the vehicle seat in a motor-driven manner is described. The seat swivel mechanism includes a lower plate, which is a fixed support body for supporting the swivel motion, and an upper plate rotatably secured on the lower plate. The upper plate and the lower plate are configured to rotate relative to each other, and the vehicle seat swivels due to the relative rotation of the upper plate and the lower plate. A driving motor is secured to any one of the upper plate and the lower plate, and an internal gear, which is secured to any one of the upper plate and the lower plate, is rotated by the driving motor, thereby swiveling the vehicle seat.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: May 11, 2021
    Assignee: HYUNDAI TRANSYS INC.
    Inventors: Jae Yong Jang, Jae Sung Lee, Soo Hwan Jeong
  • Publication number: 20200198499
    Abstract: A seat swivel mechanism secured under a vehicle seat and configured to swivel the vehicle seat in a motor-driven manner is described. The seat swivel mechanism includes a lower plate, which is a fixed support body for supporting the swivel motion, and an upper plate rotatably secured on the lower plate. The upper plate and the lower plate are configured to rotate relative to each other, and the vehicle seat swivels due to the relative rotation of the upper plate and the lower plate. A driving motor is secured to any one of the upper plate and the lower plate, and an internal gear, which is secured to any one of the upper plate and the lower plate, is rotated by the driving motor, thereby swiveling the vehicle seat.
    Type: Application
    Filed: August 2, 2019
    Publication date: June 25, 2020
    Inventors: Jae Yong JANG, Jae Sung LEE, Soo Hwan JEONG
  • Publication number: 20200198502
    Abstract: The present disclosure provides a seat track mechanism installed beneath a vehicle seat in order to move the vehicle seat in the forward and backward directions. A monotrack mechanism, to which a monopost structure and a single rail structure are applied, is installed at the bottom of the seat. The seat track mechanism includes a structure for hook-engaging lower and upper rails constituting the mono track mechanism by hook guides, thereby being capable of securing sufficient strength upon head-on or rear-end collision. The present disclosure also provides a seat track mechanism for a vehicle including a locking mechanism capable of enhancing stability of a passenger through structural reinforcement given at the bottom of the vehicle when it is necessary to ensure safety of the passenger in a situation such as collision or sudden stop or the like.
    Type: Application
    Filed: August 2, 2019
    Publication date: June 25, 2020
    Inventors: Soo Hwan JEONG, Jae Sung LEE, Jae Sang LIM
  • Patent number: 8221716
    Abstract: A method of synthesizing carbon nanotubes including forming a solution including an organometallic compound containing catalyst particles and a solvent, adding at least one support to the solution, wherein the carbon nanotubes are synthesized on a surface of the at least one support, and applying radiation to the solution to which the at least one support is added.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: July 17, 2012
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Hwan Jeong, Wan-Jun Park, Jong-Bong Park, Ju-Hye Ko
  • Patent number: 7901586
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: March 8, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Publication number: 20100272900
    Abstract: Provided is a method of fabricating ZnO nanowires using a sonicator. The method includes (a) forming a Zn layer on a surface of a substrate, (b) patterning the Zn layer, and (c) forming ZnO nanowires on the Zn layer by immersing the substrate, on which the Zn layer is patterned in a mixed solution made of a solution containing Zn and a solution ionizing Zn, in a sonicator. ZnO nanowires may be formed at a predetermined location at room temperature according to the present invention.
    Type: Application
    Filed: January 3, 2008
    Publication date: October 28, 2010
    Inventors: Wan-jun Park, Soo-hwan Jeong
  • Patent number: 7554255
    Abstract: An electric field emission device having a triode structure is fabricated by using an anodic oxidation process. The device includes a supporting substrate, a bottom electrode layer to be used as an cathode electrode of the device, a gate insulating layer having a plurality of first sub-micro holes, a gate electrode layer having a plurality of second sub-micro holes connecting to the first sub-micro holes, an anode insulating layer having a plurality of third sub-micro holes connecting to the second sub-micro holes, a top electrode layer for hermetically sealing the device, the top electrode layer being used as an anode of the device and a plurality of emitters formed in the first sub-micro holes. The emitters are formed so as to come into as close contact as possible to the electrodes of the device, which results in decreasing a driving voltage.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: June 30, 2009
    Assignee: Postech Foundation
    Inventors: Kun-Hong Lee, Sun-Kyu Hwang, Soo-Hwan Jeong
  • Publication number: 20080257861
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Application
    Filed: July 30, 2007
    Publication date: October 23, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Patent number: 7282446
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Grant
    Filed: April 7, 2004
    Date of Patent: October 16, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Publication number: 20070207619
    Abstract: A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.
    Type: Application
    Filed: April 7, 2004
    Publication date: September 6, 2007
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Sun-ae Seo, In-sook Kim
  • Publication number: 20060239892
    Abstract: A method of synthesizing carbon nanotubes including forming a solution including an organometallic compound containing catalyst particles and a solvent, adding at least one support to the solution, wherein the carbon nanotubes are synthesized on a surface of the at least one support, and applying radiation to the solution to which the at least one support is added.
    Type: Application
    Filed: November 18, 2005
    Publication date: October 26, 2006
    Inventors: Soo-Hwan Jeong, Wan-Jun Park, Jong-Bong Park, Ju-Hye Ko
  • Patent number: 7115306
    Abstract: Provided are a method of growing carbon nanotubes and a carbon nanotube device. The method includes: depositing an aluminum layer on a substrate; forming an insulating layer over the substrate to cover the aluminum layer; patterning the insulating layer and the aluminum layer on the substrate to expose a side of the aluminum layer; forming a plurality of holes in the exposed side of the aluminum layer to a predetermined depth; depositing a catalyst metal layer on the bottoms of the holes; and growing the carbon nanotubes from the catalyst metal layer.
    Type: Grant
    Filed: January 18, 2005
    Date of Patent: October 3, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-hwan Jeong, Wan-jun Park, In-kyeong Yoo, Ju-hye Ko
  • Publication number: 20060196772
    Abstract: Provided are a microfluidic device for separating polarizable analytes via dielectrophoresis, the device including: a microchannel including a membrane having nano- to micro-sized pores; at lest two electrodes generating a spaciously non-uniform electric field in the nano- to micro-sized pores when an AC voltage is applied; and a power source applying the AC voltage to the electrodes, and a method of separating polarizable target materials using the device.
    Type: Application
    Filed: February 9, 2006
    Publication date: September 7, 2006
    Inventors: Sook-young Kim, Yoon-kyoung Cho, Soo-hwan Jeong, Jin-tae Kim, Chin-sung Park
  • Publication number: 20060180845
    Abstract: A memory device with a silicon rich oxide layer and a method of manufacturing the same are provided. The memory device with a silicon rich oxide layer may include a semiconductor substrate, source/drain regions formed on the semiconductor substrate, and a gate structure formed on the semiconductor substrate. The gate structure may contact with the source/drain regions and may include a silicon oxide layer with a silicon content greater than that of a silicon oxide layer (SiO2).
    Type: Application
    Filed: February 10, 2006
    Publication date: August 17, 2006
    Inventors: Young-Kwan Cha, In-Kyeong Yoo, Soo-Hwan Jeong
  • Patent number: 7091054
    Abstract: An emitter for an electron-beam projection lithography (EPL) system and a manufacturing method therefor are provided. The electron-beam emitter includes a substrate, an insulating layer overlying the substrate, and a gate electrode including a base layer formed on top of the insulating layer to a uniform thickness and an electron-beam blocking layer formed on the base layer in a predetermined pattern. The manufacturing method includes steps of: preparing a substrate; forming an insulating layer on the substrate; forming a base layer of a gate electrode by depositing a conductive metal on the insulating layer to a predetermined thickness; forming an electron-beam blocking layer of the gate electrode by depositing a metal capable of anodizing on the base layer to a predetermined thickness; and patterning the electron-beam blocking layer in a predetermined pattern by anodizing. The emitter provides a uniform electric field within the insulating layer and simplify the manufacturing method therefor.
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: August 15, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Chang-wook Moon, Soo-hwan Jeong, Dong-wook Kim
  • Patent number: 6998162
    Abstract: An optical recording medium having a phase transition material film and a method of manufacturing the optical recording medium are provided. In the method, first, a phase transition material film, a sacrificial film, and a metal film are sequentially stacked on a substrate. Next, the metal film is anodized to form a metal oxide film having a plurality of holes, and portions of the sacrificial film exposed through the holes are anode-oxidized to form oxide films. Thereafter, the phase transition material film is patterned by removing the metal oxide film and by etching the sacrificial film and the phase transition material film using the oxide films as a mask. Then, the oxide films are removed from the sacrificial film, and an upper insulation film, a reflection film, and a protection film are deposited on the upper surface of the patterned phase transition material film.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: February 14, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, In-sook Kim
  • Publication number: 20050285502
    Abstract: An electric field emission device having a triode structure is fabricated by using an anodic oxidation process. The device includes a supporting substrate, a bottom electrode layer to be used as an cathode electrode of the device, a gate insulating layer having a plurality of first sub-micro holes, a gate electrode layer having a plurality of second sub-micro holes connecting to the first sub-micro holes, an anode insulating layer having a plurality of third sub-micro holes connecting to the second sub-micro holes, a top electrode layer for hermetically sealing the device, the top electrode layer being used as an anode of the device and a plurality of emitters formed in the first sub-micro holes. The emitters are formed so as to come into as close contact as possible to the electrodes of the device, which results in decreasing a driving voltage.
    Type: Application
    Filed: July 30, 2003
    Publication date: December 29, 2005
    Applicant: POSTECH FOUNDATION
    Inventors: Kun-Hong Lee, Sun-Kyu Hwang, Soo-Hwan Jeong
  • Patent number: 6953946
    Abstract: An emitter for an electron-beam projection lithography (EPL) system and a manufacturing method therefor are provided. The electron-beam emitter includes a substrate, an insulating layer overlying the substrate, and a gate electrode including a base layer formed on top of the insulating layer to a uniform thickness and an electron-beam blocking layer formed on the base layer in a predetermined pattern. The manufacturing method includes steps of: preparing a substrate; forming an insulating layer on the substrate; forming a base layer of a gate electrode by depositing a conductive metal on the insulating layer to a predetermined thickness; forming an electron-beam blocking layer of the gate electrode by depositing a metal capable of anodizing on the base layer to a predetermined thickness; and patterning the electron-beam blocking layer in a predetermined pattern by anodizing. The emitter provides a uniform electric field within the insulating layer and simplify the manufacturing method therefor.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: October 11, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: In-kyeong Yoo, Chang-wook Moon, Soo-hwan Jeong, Dong-wook Kim
  • Publication number: 20050202639
    Abstract: Provided is a method of manufacturing a memory device that comprises a gate including uniformly distributed silicon nano dots. The method includes forming a gate on a substrate, the gate including, stacked in sequence an insulating film, nano dot layers separated by a predetermined lateral distance, and a conductive film pattern, forming a source region and a drain region contacting the gate in the substrate, and forming first and second metal layers on the source region and the drain region, respectively.
    Type: Application
    Filed: March 4, 2005
    Publication date: September 15, 2005
    Applicant: Samsung Electronics Co., Ltd
    Inventors: In-kyeong Yoo, Soo-hwan Jeong, Won-il Ryu