Abstract: The present invention is concerned with immunomodulatory and antimicrobial peptide materials obtainable from the body fluid of invertebrates, especially insects.

Abstract: There is disclosed a method of manufacturing a floating gate in a flash memory device. In order to minimize the distance between floating gates, the method includes patterning a polysilicon film using a first PSG pattern in which a second PSG spacer is formed on and at the sidewall of the polysilicon film, and removing the first PSG film pattern and the second PSG film spacer using 50:1 HF or 9:1 BOE. Therefore, it can minimize the size of the device without damaging a polysilicon film and a field oxide.

Abstract: A liquid crystal display includes an insulating substrate, gate and data lines formed on the substrate to define pixel areas, or collectively a display area. Gate signal interconnection wires are formed at a corner portion of the substrate outside the display area to transmit gate electrical signals, and provided with gate signal interconnection lines and first and second gate signal interconnection pads connected to both ends of the gate signal interconnection lines. A gate insulating layer, and a protective layer are further formed on the substrate, and provided with first and second contact holes exposing the first and second gate signal interconnection pads. Gate and data signal transmission films are attached to the substrate, and provided with first and second gate signal leads and first and second gate signal wires. The first and second gate signal leads are connected to the first and second gate signal interconnection pads through the first and second contact holes.

Abstract: A data file reproducing method for a personal terminal which can include providing a data file by connecting a data supplying server to a communication network, selecting a data file, connecting the data supplying server to a personal terminal, transferring the selected data file to the personal terminal, and storing automatically the transferred data file in the personal terminal. A data reproducing apparatus for a personal terminal which can include a wireless transceiver that can transfer and receive data files to and from a mobile communication network, a storage device, a controller, a decoder and a reproducing unit.

Abstract: The Mo or MoW composition layer has a low resistivity of less than 15 &mgr;&OHgr;cm and is etched to have a smooth taper angle using an Al alloy enchant or a Cr enchant, and the Mo or MoW layer is used for a wiring of a display or a semiconductor display along with an Al layer or a Cr layer. Since the Mo or MoW layer can be deposited so as to give low stress to the substrate by adjusting the deposition pressure, a single MoW layer can be used as a wiring by itself. When contact holes are formed in the passivation layer or the gate insulating layer, a lateral etch is reduced by using polymer layer, an etch gas system using CF4+O2 can prevent the etch of the Mo or MoW alloy layer, and an etch gas of SF6+HCl (+He) or SF6+Cl2 (+He) can form the edge profile of contact holes to be smoothed.

Abstract: A semiconductor memory device and manufacturing method, including a bit line connector and a lower electrode connector that respectively connect a bit line and a capacitor lower electrode of the device to active areas of a semiconductor substrate. The connectors are formed using a line-type self-aligned photoresist mask pattern positioned on an interlevel dielectric layer formed on the substrate, which exposes only a portion of the dielectric layer corresponding to a source region and which extends in a direction which a gate electrode extends, to provide a misalignment margin. The bit line connector and the lower electrode connector are respectively formed by one-time mask processes. A contact hole for the bit line connector in a cell area, and a contact hole for a metal wiring plug in a peripheral area are simultaneously formed, alleviating etching burden during subsequent forming of a metal wiring pad.

Abstract: A synchronous dynamic random access memory capable of accessing data in a memory cell array therein in synchronism with a system clock from an external system such as a central processing unit (CPU).

Abstract: A frame fixator and operation system thereof, the fixator comprising an upper end ring and a lower end ring, and a plurality of length adjustment means coupled at both ends thereof to the upper end ring and the lower end ring, wherein the length adjustment means include an actuator, a moving member movable by the actuator and a digital indicator for indicating a length of the length adjustment means changeable to the movement of the moving member, the fixator and peration system for enabling to automatically adjust a distraction rate and distraction frequency of fracture during bone deformity correction and lengthening and to easily adjust the length by digitally indicating changed value of length according to manual or automatic manipulation.

Abstract: A bus system and execution scheduling method used for the bus system are provided. The execution scheduling method used for the bus system includes the steps of (a) transmitting one or more access commands issuing from one or more master devices to corresponding slave devices; (b) storing the transmitted access commands; and (c) the slave devices executing the stored access commands in the order in which execution preparation of access commands is completed. According to the method, the order of execution of the access commands is adjusted, thereby providing a bus system having improved data processing speed and the execution scheduling method thereof.

Abstract: A method of manufacturing a contact plug in a semiconductor device is disclosed. In-situ thermal doping of an impurity such as phosphorous (P) during the process by which polysilicon for a contact plug is formed by selective growth method and after in-situ doping after the growth process is employed in order to increase the concentration of the impurity in the contact plug. As a result, the disclosed method can reduce the interfacial resistance at the plug to improve the electrical characteristics of a device of more than 1G bits.

Abstract: Integrated circuit memory devices include a word line driver circuit electrically coupled to a plurality of rows of normal memory cells and at least one row of spare memory cells that can be used to replace normal rows having defective cells therein. The word line driver circuit includes a spare word line driver that is electrically coupled to the at least one row of spare memory cells. The spare word line driver includes a programmable address decoder, which generates a spare word line driver enable signal and is responsive to a plurality of row addresses, and a selector switch that is responsive to the spare word line driver enable signal. To assist in performing a multi-row address test, a spare word line driver enable signal precharger is provided that resets the spare word line driver enable signal to a logic level that turns on the selector switch when the memory device is undergoing a multi row address test.

Abstract: A metal oxide electrode for a supercapacitor and a manufacturing method thereof are disclosed. Potassium permanganate is absorbed on a conductive material, such as carbon or activated carbon, and mixed with a solution including manganese acetate so as to form amorphous manganese oxide. Amorphous manganese oxide powder is grounded to a powder which is mixed with binder to form an electrode having a predetermined shape. The electrode reduces equivalent serial resistance and enhances high frequency characteristics since the contact area and the adhesion strength between the manganese oxide and the conductive carbon are improved. Also, the electrode has high capacitance suitable for a supercapacitor, which is manufactured therefrom at a greatly reduced cost.

Abstract: A method for preparing a positive photoresist layer is provided. In this method, a photoresist composition is drop-wise applied on an insulator layer or a conductive metal layer formed on a substrate. The photoresist composition includes a polymer resin, a sensitizer for changing solubility of the photoresist layer when exposed and a solvent. The coated substrate is rotated at the speed of 1,250 to 1,350 rpm for 4.2 to 4.8 seconds. The coated substrate is then dried and the dried substrate is exposed to some form of radiation. Next, the exposed portion is removed by using an alkaline developing solution. The solvent preferably includes 3-methoxybutyl acetate and 4-butyrolactone, or includes 3-methoxybutyl acetate, 2-heptanone, and 4-butyrolactone.

Abstract: A display device and a method for driving the same are disclosed. The display device confirms whether display data applied to a display panel are uniformly maintained for a predetermined time. As a result of confirmation, if the display data are uniformly maintained for a predetermined time, pixels of the display panel are made for a predetermined block unit so that screen save modes are performed to sequentially apply screen save mode data to pixels of each block. The screen save modes are completed after there are sequentially performed for all blocks on the display panel. Thus, uniform luminance deviation can be obtained on the display panel of the display device and further picture quality of the display device can be improved.

Abstract: A method for manufacturing a gate structure for use in a semiconductor device including the steps of sequentially forming a gate oxide layer, a polysilicon layer, a tungsten layer and a nitride layer on top of a semiconductor substrate, patterning the nitride layer, the tungsten layer, the polysilicon layer and the gate oxide layer into a predetermined configuration, and carrying out a rapid thermal annealing (RTA) in an NH3 ambient, thereby forming a diffusion barrier layer between a patterned tungsten layer and a patterned polysilicon layer.

Abstract: A current-reusing bleeding mixer capable of providing a higher conversion gain, linearity and lower noise figure employing a field-effect transistor includes a first to a fourth transistor and a first and a second load element. The first transistor amplifies a radio frequency (RF) signal. The second and the third transistor, each connected to the first transistor, receive a balanced local oscillator (LO) signal to mix it with the RF signal. The first and the second load element are connected between a supply voltage source and the second transistor and between the supply voltage source and the third transistor, respectively. The fourth transistor, connected between the supply voltage source and the first transistor, amplifies the RF signal and bleeds a current from the supply voltage source.

Abstract: The present invention is concerned with immunomodulatory and antimicrobial peptide materials obtainable from the body fluid of invertebrates, especially insects.

Abstract: A compatible optical pickup capable of recording or reproducing information on or from compact disc (CD) family media such as CD rewritable (CD-RW) and digital versatile disc (DVD) by adopting a stepped planar lens having a plurality of gratings.

Abstract: Methods are provided for conductively contacting an integrated circuit, including a plurality of spaced apart lines thereon, using a dummy dielectric layer. A dummy dielectric layer is formed between first selected ones of the spaced apart lines. An interdielectric layer is formed between second selected ones of the spaced apart lines that are different from the first selected ones of the lines. The interdielectric layer has a lower etch rate than the dummy dielectric layer with respect to a predetermined etchant. The dummy dielectric layer is etched with the predetermined etchant, to remove at least some of the dummy dielectric layer between the first selected ones of the spaced apart lines. A conductive layer is formed between the first selected ones of the spaced apart lines from which at least some of the dummy dielectric layer has been removed, to electrically contact the integrated circuit between the first selected ones of the spaced apart lines.

Abstract: A method of forming a gate electrode in semiconductor device which can prevent transformation of the gate electrode, is disclosed. According to the present invention, a gate insulating layer, a doped polysilicon layer and a sacrificial layer are formed on a semiconductor substrate, sequentially. The sacrificial layer and the polysilicon layer are then etched in the shape of a gate electrode to form a sacrificial pattern and a polysilicon pattern. Next, the substrate is re-oxidized to form a re-oxidation layer on the side walls of the polysilicon pattern and LDD ions are implanted into the substrate of both sides of the re-oxidation layer. A spacer of an insulating layer is then formed on the side walls of the sacrificial pattern and the re-oxidation layer and impurity ions of a high concentration are implanted into the substrate of both sides of the spacer. Thereafter, an intermediate insulating layer is formed on the overall substrate and etched to expose the surface of the sacrificial pattern.