Abstract: A display device includes a substrate and a transistor disposed on the substrate and including a semiconductor layer, wherein the semiconductor layer includes a mesh structure, and wherein a plurality of openings are formed in the semiconductor layer.

Abstract: A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.

Abstract: A display device includes a substrate and a transistor disposed on the substrate and including a semiconductor layer, wherein the semiconductor layer includes a mesh structure, and wherein a plurality of openings are formed in the semiconductor layer.

Abstract: A display device includes a pixel electrode disposed on a first surface of a substrate, a light emitting layer disposed on the pixel electrode, a common electrode disposed on the light emitting layer, a supply voltage line disposed on the first surface of the substrate and applying a voltage to the common electrode, a first auxiliary conductive layer disposed on a second surface of the substrate, and a first connection conductive layer at least partially disposed on a side surface of the substrate and electrically connecting the first auxiliary conductive layer to the supply voltage line.

Abstract: A gate driver for a display device includes: a clock signal line to transfer a clock signal; and a plurality of stages to sequentially output a gate signal based upon the clock signal in response to a carry signal. The plurality of stages include a plurality of thin film transistors, and at least one of the plurality of thin film transistors includes a thin film transistor including an oxide semiconductor. The at least one thin film transistor includes a first gate electrode and a second gate electrode disposed in different layers, the oxide semiconductor is disposed between the first gate electrode and the second gate electrode, and the first gate electrode and the second gate electrode are connected to receive a common voltage signal.

Abstract: A liquid crystal display (LCD) includes a first substrate that has a first pixel area with a first transmitting region and a first non-transmitting region and a second pixel area with a second transmitting region and a second non-transmitting region, a first pixel electrode disposed on the first substrate in the first pixel area, and a second pixel electrode disposed on the first substrate in the second pixel area. An area of the first pixel electrode in the first transmitting region is greater than that of the second pixel electrode in the second transmitting region, and an area of the first pixel electrode in the first non-transmitting region is less than that of the second pixel electrode in the second non-transmitting region.

Abstract: A liquid crystal display, includes: a substrate; a gate line including a gate pad and a data line including a data pad, the gate and data lines being disposed on the substrate; a thin film transistor connected to the gate line and the data line; an organic layer disposed on the thin film transistor; a pixel electrode disposed on the organic layer; a first contact assistant disposed on the gate pad; a second contact assistant disposed on the data pad; a first insulating layer disposed on the pixel electrode; and a common electrode disposed on the first insulating layer, the common electrode overlapping with the pixel electrode. The common electrode includes first cutouts, the first insulating layer includes second cutouts, the plane shapes of the first and second cutouts are substantially the same, and the pixel electrode includes a polycrystalline transparent conductive material.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A liquid crystal display (LCD) includes a first substrate that has a first pixel area with a first transmitting region and a first non-transmitting region and a second pixel area with a second transmitting region and a second non-transmitting region, a first pixel electrode disposed on the first substrate in the first pixel area, and a second pixel electrode disposed on the first substrate in the second pixel area. An area of the first pixel electrode in the first transmitting region is greater than that of the second pixel electrode in the second transmitting region, and an area of the first pixel electrode in the first non-transmitting region is less than that of the second pixel electrode in the second non-transmitting region.

Abstract: A display device may include an insulating layer. The display device may further include a first field-generating electrode that overlaps the insulating layer. The display device may further include a second field-generating electrode that overlaps the first field-generating electrode and has a cutout. An exposed portion of the insulating layer may be exposed through the cutout and may be exposed between an edge (or boundary) of the first field-generating electrode and an end portion of the second field-generating electrode in a layout view of the display device.

Abstract: A liquid crystal display includes: a first insulation substrate; a first gate conductor disposed on the first insulation substrate and in a same layer as a gate line and a second gate conductor disposed on the first insulation substrate and in the same layer as the gate line; a gate insulating layer disposed on the first gate conductor and the second gate conductor; a data conductor disposed on the gate insulating layer and in a same layer as a data line; a thin film transistor disposed on the first insulation substrate; a first spacer disposed on the first insulation substrate; and a second spacer disposed on the first insulation substrate, where heights or widths of the first and second spacers are different from each other and having different heights or widths, and the second spacer overlaps the first gate conductor and the second gate conductor.

Abstract: A liquid crystal display device includes a first substrate, a first electrode on the first substrate, and a second electrode on the first substrate, spaced apart from the first electrode and overlapping at least a part of the first electrode. the second electrode includes a plurality of branch electrodes, and a coupling portion which couples the plurality of branch electrodes to each other. The coupling portion includes a longitudinal coupling portion extended in a length direction of the branch electrode and a transverse coupling portion extended in a width direction of the branch electrode. An edge portion of the first electrode is disposed between at least one of the plurality of branch electrodes and the longitudinal coupling portion, in a plan view.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A liquid crystal display includes a substrate, a plurality of signal lines, a gate driver, and a sealant. The substrate includes a display area and a peripheral area outside the display area. The signal lines are integrated with the substrate and include a clock signal line. The gate driver includes a stage located between the clock signal line and the display area. The stage is integrated with the substrate and is configured to apply a gate voltage to the display area. The sealant is distributed over part of the peripheral area. A seal region where the sealant is distributed includes a seal line, and the clock signal line is located within the seal line. The clock signal line is located further away from the stage than the other signal lines.

Abstract: A display substrate includes a gate line disposed on a base substrate and extending in a direction. A data line crosses the gate line. A thin film transistor comprises a gate electrode, a semiconductor pattern, a source electrode, and a drain electrode. The thin film transistor is connected to the gate line and the data line. A pixel electrode is connected to the thin film transistor. A light blocking pattern overlaps the semiconductor pattern. The light blocking pattern includes a haze-processed material of substantially the same material as the pixel electrode.

Abstract: A liquid crystal display device includes a first substrate, a first electrode on the first substrate, and a second electrode on the first substrate, spaced apart from the first electrode and overlapping at least a part of the first electrode. the second electrode includes a plurality of branch electrodes, and a coupling portion which couples the plurality of branch electrodes to each other. The coupling portion includes a longitudinal coupling portion extended in a length direction of the branch electrode and a transverse coupling portion extended in a width direction of the branch electrode. An edge portion of the first electrode is disposed between at least one of the plurality of branch electrodes and the longitudinal coupling portion, in a plan view.

Abstract: A thin film transistor array panel includes: a data line which extends in a column direction and transfers a data voltage; a first pixel electrode and a second pixel electrode connected to the data line and adjacent in a row direction; a first thin film transistor connected to the first pixel electrode and the data line, and including a first source electrode and a first drain electrode; and a second thin film transistor connected to the second pixel electrode and the data line, and including a second source electrode and a second drain electrode. The first pixel electrode is at the right of the data line, the second pixel electrode is at the left of the data line, and relative positions of the first source electrode and the first drain electrode are the same as relative positions of the second source electrode and the second drain electrode.

Abstract: A liquid crystal display includes a first substrate, gate lines and data lines disposed on a display area of the first substrate, a common voltage line disposed on a peripheral area of the first substrate, a common voltage transmission unit extending from the common voltage line, an organic layer disposed on the common voltage transmission unit and the common voltage line, a connecting member disposed on the organic layer disposed on the peripheral area, a first insulating layer disposed on the pixel electrode and the connecting member, a common electrode disposed on the first insulating layer, and a short point connecting the connecting member and the common electrode to each other. The common electrode and the first insulating layer include a plurality of cutouts in the peripheral region and display region of the first substrate which have substantially a same plane shape as each other.